Leakage-Based Startup Current Circuit With PVT-Stable Biasing
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Solution Overview
Problem
Existing integrated circuit (IC) startup circuits are susceptible to variations in leakage currents due to process parameters, temperature, and supply voltage, leading to inconsistent biasing and potential device reliability issues, with existing models being inaccurate and sensitive to noise.
Innovation Solution
A startup current circuit utilizing diode coupled transistors and current mirrors to generate a startup current that is independent of input voltage, manufacturing process variations, and temperature, by employing matched transistors and current mirroring to stabilize the startup process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a resistor is used to provide startup current in high voltage applications, then sufficient startup current can be provided, but the resistor becomes physically large consuming excessive device area
Solution Approach 1:
The patent changes the operating parameters of MOS transistors to operate in weak inversion mode, where subthreshold leakage current becomes the dominant mechanism. By adjusting transistor dimensions (W/L ratios) and utilizing the exponential current-voltage relationship in weak inversion, the circuit generates sufficient startup current without requiring large physical components, thereby resolving the area constraint while maintaining reliability
Solution Approach 2:
The patent replaces the traditional resistor-based startup current mechanism with a transistor-based mechanism utilizing subthreshold leakage. This substitution eliminates the need for large physical resistors, as the leakage current through properly dimensioned MOS transistors can be controlled and optimized to provide adequate startup current while occupying minimal device area
2Productivity
If diode leakage current is used for startup, then startup current can be generated, but the leakage current is highly sensitive to process, voltage, and temperature variations
Solution Approach 1:
The patent implements feedback mechanisms through current mirrors that sense and replicate the leakage current characteristics. By using matched transistor pairs and feedback loops, the circuit compensates for variations in leakage current due to process, voltage, and temperature changes, thereby stabilizing the startup current while maintaining productive startup functionality
Solution Approach 2:
The patent carefully selects and matches transistor parameters (W/L ratios, threshold voltages) to ensure that the subthreshold leakage currents are balanced across different transistors. By operating in the weak inversion region where leakage current dominates and is more predictable, the circuit achieves both productive startup current generation and improved stability against PVT variations
3Ease of manufacture
If existing leakage current models are used for simulation, then simulation can be performed, but the models are inaccurate and sensitive to measurement noise
Solution Approach 1:
The patent employs simplified transistor models that are computationally efficient and less sensitive to measurement noise, accepting some approximation in exchange for robust simulation performance. By using standard CMOS transistor models with carefully selected parameters rather than highly complex leakage models, the simulation remains manufacturable and practical while achieving sufficient accuracy for startup circuit design
Data Source
AI summary
Disclosed herein is a startup current circuit, including a diode coupled transistor connected between an input node and a third node, and a feedback transistor connected between the input node and a first node, the feedback transistor having a control terminal coupled to receive a feedback voltage at a second node. A first current mirror has an input connected to the third node and an output connected to the second node. A second current mirror has an input connected to the first node and an output connected to the second node. A first sink transistor is connected between the first node and an output node through a resistor, and has a control terminal connected to a control node of the first current mirror. A second sink transistor is connected between the first node and the output node, and has a control terminal connected to the first node.