Learning Component for IC Parasitic Extraction
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Solution Overview
Problem
Field solvers are too slow to compute parasitic capacitance for complete conventional IC chip designs, and existing RC extraction models are sub-optimal due to lack of knowledge about specific design geometries, leading to inefficient electrical analysis.
Innovation Solution
Implementing a memory and learning component that uses recommended test sets to automatically test and improve capacitance and resistance estimates, selecting unique conductor geometries for evaluation, and incorporating variability models from manufacturing to tailor the extraction model to specific designs and manufacturing specifications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If field solver is used to compute parasitic capacitance, then accuracy is improved, but computation time increases significantly
Solution Approach 1:
The system performs preliminary computation using the field solver on a limited set of test cases to build a training dataset. This preliminary action creates extraction models that can be rapidly applied to complete IC designs without requiring the field solver to compute all parasitic capacitances, thus achieving high accuracy while reducing overall computation time.
Solution Approach 2:
The system creates simplified extraction models that copy the essential behavior of the field solver based on training data. These extraction models are then used to estimate parasitic capacitance for entire IC designs, providing field solver-level accuracy at much lower computational cost by avoiding direct field solver execution on all geometries.
2Adaptability or versatility
If extraction models are created without knowledge of specific design geometries, then model generality is improved, but analysis accuracy deteriorates
Solution Approach 1:
The system uses feedback from actual IC design geometries to iteratively improve extraction models. The evaluation component analyzes real design layouts and feeds this information back to the learning component, which updates the extraction models to better match the specific geometry types encountered in practice, thereby improving accuracy while maintaining generality.
Solution Approach 2:
The extraction models are made dynamic and adaptive rather than static. The learning component continuously updates model parameters based on feedback from evaluated designs, allowing the models to evolve and adapt to the specific types of geometries they encounter, thus improving accuracy without sacrificing versatility.
3Productivity
If limited test cases are used to create extraction models, then computation time is reduced, but model accuracy deteriorates
Solution Approach 1:
A limited but strategically selected set of test cases is used in preliminary action to build initial extraction models. These test cases are chosen to represent the range of geometries likely to be encountered, enabling rapid model creation that maintains acceptable accuracy while avoiding the computational burden of exhaustive field solver execution.
Solution Approach 2:
The system uses a partial set of test cases rather than attempting to cover all possible geometries. This partial action is sufficient to create functional extraction models that provide good estimates for typical designs, achieving an optimal balance between computation time and accuracy without requiring excessive test cases.
Data Source
AI summary
An improved method, system, user interface, and computer program product is described for using a memory and learning component to improve capacitance and resistance estimates based on the types of layouts and devices being evaluated. According to some approaches, a learning component is implemented that uses recommended test sets from the evaluation component to automatically test the extraction estimates against the field solver. Variability models from manufacturing or electrical analysis may also be used to select a series of objects (unique conductor geometries) that make up a conduction path or net or specific conductor geometries for evaluation and additional learning improvement.