Light Emitting Device Array Circuit Reducing Ghost Image via Pre-Discharge Control
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Solution Overview
Problem
Conventional light emitting device array circuits suffer from ghost image issues due to parasitic capacitance in scan line switch circuits and data line buffer circuits, leading to unwanted light emission in adjacent LED devices during scanning sequences.
Innovation Solution
The proposed solution involves a light emitting device array circuit with a pre-discharge and pre-charge control mechanism, where a pre-discharge control circuit provides a pre-discharge level to scan nodes and a pre-charge control amplifier circuit provides a pre-charge level to data nodes during specific time periods, ensuring a dead time between dimming level changes to prevent residual charges from causing ghost images. This includes Eco, first performance, and second performance modes to optimize power consumption while reducing ghost images.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If scan line switch circuits supply scan conduction voltage sequentially to scan lines, then LED devices are lit up in sequence to display images, but parasitic capacitance in scan line switch circuits causes residual charges that generate upper ghost images
Solution Approach 1:
The patent applies preliminary action by providing a pre-discharge voltage to the scan node before the scan line switch circuit supplies the scan conduction voltage. This pre-discharge operation removes residual charges from the parasitic capacitance in advance, preventing upper ghost images before they can occur during the sequential scanning process.
2Illumination intensity
If data line buffer circuits provide dimming levels to data lines, then LED devices emit light at proper brightness, but parasitic capacitance in data line buffer circuits causes residual charges that generate lower ghost images
Solution Approach 1:
The patent applies preliminary action by providing a pre-charge voltage to the data node before the data line buffer circuit provides the dimming level. This pre-charge operation removes residual charges from the parasitic capacitance in advance, preventing lower ghost images before they can occur during the dimming operation.
3Object-generated harmful factors
If pre-discharge and pre-charge operations are performed during dead time, then ghost images are reduced, but additional control circuits increase device complexity
Solution Approach 1:
The patent merges the pre-discharge and pre-charge operations into the existing dead time periods between sequential scanning operations. By utilizing the already-available dead time rather than adding separate operation periods, the patent reduces ghost images without significantly increasing device complexity or operation time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces both upper and lower ghost images by utilizing pre-discharge and pre-charge operations, with the added modes enhancing power efficiency while maintaining effective image reduction.
Implementation Method 1
The upper ghost image phenomenon results from a parasitic capacitance Cr in the scan line switch circuit 120
Implementation Method 2
The lower ghost image phenomenon results from a parasitic capacitance Cc in the data line buffer circuit 130
Data Source
AI summary
A light emitting device array circuit capable of reducing ghost image includes: a light emitting device array, plural scan line switch circuits, and a driver circuit. The light emitting device array includes plural light emitting devices arranged in plural scan lines and plural data lines. In one frame, plural scan line switch circuits respectively electrically connect plural scan nodes in plural corresponding scan lines to a scan conduction voltage in a non-overlapping sequential order. Data line buffer circuits of the driver circuit provide predetermined dimming levels to corresponding data nodes respectively according to data operation signals. A pre-discharge control amplifier circuit of the driver circuit is coupled to the plural scan nodes and provides a pre-discharge level to at least one predetermined scan node during a predetermined pre-discharge time period according to a pre-discharge signal.