LED Chip Transfer Sorting by Photoelectric Binning Blocks
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Solution Overview
Problem
The existing chip sorting process for light-emitting-diode (LED) chips is inefficient due to the time-consuming travel of robots between wafers and bin tables, requiring hours to categorize 40,000 chips, which affects manufacturing efficiency.
Innovation Solution
A chip transferring method involving a first load-bearing structure for fixing chips, measuring photoelectric characteristics, categorizing chips into qualified and unqualified groups, and using a second load-bearing structure with different adhesive properties to selectively transfer qualified chips, enhancing transfer efficiency through adhesion differences and peptization processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a robot is used to pick and put chips one by one during sorting, then chips can be categorized according to photoelectric characteristic values, but the sorting process takes a lot of time due to repeated travel between the wafer and the bin table
Solution Approach 1:
The patent segments the sorting process into two distinct stages: first, removing unqualified chips (second portion chips) from the wafer, and second, transferring qualified chips (first portion chips) to the bin table. This segmentation allows different handling methods for different chip groups, improving overall sorting efficiency by eliminating the need to pick and place every chip individually.
Solution Approach 2:
The patent extracts and removes unqualified chips (second portion chips) from the wafer in a batch operation before transferring qualified chips. This extraction approach eliminates the need for repeated individual picking and placing of all chips, significantly reducing sorting time while maintaining measurement precision.
2Manufacturing precision
If a robot picks and puts chips one by one, then chips can be sorted according to specifications, but the manufacturing efficiency is affected due to the time-consuming process
Solution Approach 1:
The patent performs preliminary removal of unqualified chips (second portion chips) from the wafer before transferring qualified chips to the bin table. This preliminary action reduces the number of chips that need to be individually handled in the subsequent transfer step, thereby reducing total sorting time while maintaining categorization accuracy.
Solution Approach 2:
The patent implements a continuous sorting process where unqualified chips are removed in one batch operation, followed by continuous transfer of qualified chips without repeated travel to the bin table. This continuity eliminates idle time and repeated movements, significantly reducing total sorting time while maintaining precision.
3Adaptability or versatility
If all chips are transferred individually to the bin table, then complete categorization can be achieved, but the process is time-consuming and affects production throughput
Solution Approach 1:
The patent segments chips into two groups: unqualified chips (second portion) removed from the wafer, and qualified chips (first portion) transferred to the bin table. This segmentation allows the majority of qualified chips to be transferred in a single batch operation rather than individually, improving throughput while maintaining complete categorization.
Solution Approach 2:
The patent discards unqualified chips (second portion chips) from the wafer in a batch removal operation, eliminating the need to individually handle these chips. This discarding approach recovers time that would have been spent picking and placing unqualified chips, thereby improving manufacturing throughput while maintaining complete categorization of all chips.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method significantly reduces sorting time by enabling single-batch transfer of qualified chips, improving manufacturing efficiency and accuracy, while maintaining the separation of unqualified chips on the original load-bearing structure.
Implementation Method 1
a first adhesive layer is formed on a second load-bearing structure, the first adhesive layer having a first adhesion to the plurality of chips
Implementation Method 2
enhancing transfer efficiency through adhesion differences and peptization processes
Data Source
AI summary
A chip transferring method includes providing a plurality of chips on a first load-bearing structure; measuring photoelectric characteristic values of the plurality of chips; categorizing the plurality of chips into a first portion chips and a second portion chips according to the photoelectric characteristic values of the plurality of chips, wherein the second portion chips comprise parts of the plurality of chips which photoelectric characteristic value falls within an unqualified range; removing the second portion chips from the first load-bearing structure; dividing the first portion chips into a plurality of blocks according to the photoelectric characteristic values, and each of the plurality of blocks comprising multiple chips of the first portion chips; and transferring the multiple chips of one of the plurality of blocks to a second load-bearing structure.