LED Chip Quantum Barrier Doping for Low-Lag Displays
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Solution Overview
Problem
Conventional Mini-LED technology in backlight and RGB displays suffers from high capacitance and charge storage, leading to display lag and dimming due to high N-type doping concentrations in the quantum barrier layers.
Innovation Solution
The LED chip structure reduces N-type doping concentration in at least two quantum barrier layers of the active layer to no greater than 4E17 atoms/cm3, adjusting capacitance and improving ESD performance through specific layer configurations and materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high N-type doping concentration (5E17 atoms/cm3 or more) is used in quantum barrier layers, then ESD performance is improved and voltage is reduced, but capacitance becomes too high causing display lag and dimming
Solution Approach 1:
The patent applies local quality by differentiating doping concentrations across different quantum barrier layers. Specifically, the first quantum barrier layer (closest to P-type semiconductor layer) has lower N-type doping concentration (≤4E17 atoms/cm3) to reduce capacitance and eliminate display lag, while the second quantum barrier layer maintains higher doping concentration (≥5E17 atoms/cm3) to ensure adequate ESD performance. This spatial differentiation of doping concentration resolves the contradiction between ESD performance and display responsiveness.
Solution Approach 2:
The patent changes the doping concentration parameter across different layers of the quantum barrier structure. By setting the N-type doping concentration of the first quantum barrier layer to be no greater than 4E17 atoms/cm3 (lower than conventional 5E17 atoms/cm3), the capacitance is reduced to eliminate display lag and dimming, while the second quantum barrier layer maintains higher doping concentration to preserve ESD performance. This parameter variation resolves the technical contradiction.
2Power
If high N-type doping concentration is used in quantum barrier layers, then voltage is reduced, but capacitance becomes too high affecting backlight and RGB display performance
Solution Approach 1:
The patent applies local quality by differentiating doping concentrations across different quantum barrier layers. Specifically, the first quantum barrier layer (closest to P-type semiconductor layer) has lower N-type doping concentration (≤4E17 atoms/cm3) to reduce capacitance and eliminate display lag, while the second quantum barrier layer maintains higher doping concentration (≥5E17 atoms/cm3) to ensure adequate ESD performance. This spatial differentiation of doping concentration resolves the contradiction between ESD performance and display responsiveness.
Solution Approach 2:
The patent changes the doping concentration parameter across different layers of the quantum barrier structure. By setting the N-type doping concentration of the first quantum barrier layer to be no greater than 4E17 atoms/cm3 (lower than conventional 5E17 atoms/cm3), the capacitance is reduced to eliminate display lag and dimming, while the second quantum barrier layer maintains higher doping concentration to preserve ESD performance. This parameter variation resolves the technical contradiction.
Data Source
AI summary
An LED chip and a display device are disclosed in the disclosure. The LED chip structure includes a semiconductor stack layer. The semiconductor stack layer includes an N-type semiconductor layer, an active layer, and a P-type semiconductor layer. The active layer is disposed above the P-type semiconductor layer. The active layer includes multiple layers formed by repeatedly stacking a well layer and a quantum barrier layer. The P-type semiconductor layer is disposed above the active layer. The N-type peak doping concentration of at least two quantum barrier layers of the active layer is no greater than 4E17 atoms/cm3.