LED Chip Metal Layout for Current Spreading and PAD Integration
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Solution Overview
Problem
Existing light-emitting diode (LED) chip structures face challenges in balancing current expansion performance and product cost, particularly in achieving efficient current distribution and high reflectivity while maintaining cost-effectiveness.
Innovation Solution
The proposed LED chip structure incorporates an integrated metal layer with Au metal material on the surface of the second-type semiconductor layer, which is electrically connected to an external driving device, and an insulating layer covering the integrated metal layer and through hole, replacing the need for a separate PAD metal layer and enhancing reliability against environmental erosion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate PAD metal layer is used for electrical connection, then electrical connection reliability is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent combines the PAD metal layer and current spreading layer into a single integrated metal layer. This integrated metal layer is disposed on the second-type semiconductor layer and provides both electrical connection function (replacing PAD) and current spreading function (replacing separate current spreading layer), thereby reducing device complexity while maintaining electrical connection reliability
Solution Approach 2:
The integrated metal layer serves multiple functions simultaneously: it acts as the PAD for electrical connection to external driving devices, functions as a current spreading layer to distribute current uniformly, and provides ohmic contact with the second-type semiconductor layer, thereby eliminating the need for separate layers
2Device complexity
If an integrated metal layer is used to replace separate PAD and current spreading layers, then device complexity is reduced, but current expansion performance may deteriorate
Solution Approach 1:
The patent merges the PAD and current spreading layer into one integrated metal layer, which maintains current expansion capability while simplifying the overall device structure and reducing manufacturing complexity
Solution Approach 2:
The patent optimizes the parameters of the integrated metal layer including material composition, thickness, and geometric dimensions to ensure adequate current spreading performance while maintaining electrical connection functionality, thereby balancing structure simplification with performance requirements
3Productivity
If traditional multi-layer structure is used, then current expansion performance is maintained, but manufacturing cost increases
Solution Approach 1:
The patent combines multiple layers (PAD and current spreading layer) into a single integrated metal layer, reducing the number of deposition steps and material usage, thereby lowering manufacturing cost while maintaining current expansion performance
Solution Approach 2:
The patent adjusts the parameters of the integrated metal layer (material selection, thickness, dimensions) to achieve optimal current expansion performance at reduced manufacturing cost by eliminating redundant layers and optimizing material usage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves current expansion capability, reduces production costs, and enhances the reliability and efficiency of the LED chip by integrating the current spreading layer and PAD functions, while maintaining high reflectivity and light extraction efficiency.
Implementation Method 1
an insulating layer, disposed on a side of the epitaxial stack facing the substrate, covering the integrated metal layer and an exposed surface of the epitaxial stack
Implementation Method 2
the first metal layer is stacked on a surface of the insulation layer facing away from the integrated metal layer, embedded in the through hole to form contact with the first-type semiconductor layer
Implementation Method 3
the integrated metal layer is disposed on a surface of the second-type semiconductor layer facing away from the active region, and the integrated metal layer comprises an exposed surface on a side of the integrated metal layer facing the second-type semiconductor layer, the exposed surface being configured to electrically connect with an external driving device
Data Source
AI summary
A light-emitting structure, comprising: a substrate, and a first metal layer, an insulating layer, an integrated metal layer, and an epitaxial stack, disposed above the substrate. The integrated metal layer is disposed on a surface of the second-type semiconductor layer facing away from the active region, and the integrated metal layer comprises an exposed surface on a side of the integrated metal layer facing the second-type semiconductor layer, the exposed surface being configured to electrically connect with an external driving device.