LEDs on Concave Silicon Substrates
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Solution Overview
Problem
Current LED manufacturing on sapphire substrates is costly and limited by thermal accumulation and light-emitting efficiency due to the use of planar structures, which restricts the amount of light-emitting material that can be effectively utilized on a given substrate size.
Innovation Solution
A method of forming light-emitting diodes (LEDs) on concave textured substrates, specifically using a bulk silicon substrate with a patterned hard mask to create concave recesses, allowing for increased surface area and reduced residual stress through selective epitaxial growth, thereby enhancing light-emitting efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If LEDs are formed on a planar substrate, then the manufacturing process is simple, but the light-emitting efficiency is restricted due to limited active layer area
Solution Approach 1:
The patent transitions from a two-dimensional planar substrate to a three-dimensional textured substrate with concave features. This dimensional change increases the surface area available for active layers, allowing more light-emitting material to be placed on the substrate while maintaining manufacturing feasibility through standard texturing processes.
Solution Approach 2:
The patent employs curved concave textures on the substrate surface rather than flat planes. These curved surfaces increase the effective area for LED formation and can improve light extraction efficiency through multiple internal reflections, directly addressing the limitation of planar structures.
2Reliability
If sapphire substrates are used for LED manufacturing, then crystal orientation compatibility is achieved, but thermal accumulation occurs due to low thermal conductivity
Solution Approach 1:
The patent changes the substrate material parameter from sapphire to an alternative material with superior thermal conductivity. This parameter change maintains the essential crystal orientation compatibility required for epitaxial growth while fundamentally improving heat dissipation capabilities to reduce thermal accumulation.
Solution Approach 2:
The patent may employ composite substrate structures that combine materials with good thermal conductivity and appropriate crystal orientation properties. This composite approach allows simultaneous optimization of both thermal management and epitaxial growth compatibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach increases the total active layer area and light-emitting efficiency of LEDs by forming them in recesses on a silicon substrate, reducing costs and improving thermal conductivity compared to traditional sapphire substrates.
Implementation Method 1
allowing for increased surface area and reduced residual stress through selective epitaxial growth
Implementation Method 2
improving thermal conductivity compared to traditional sapphire substrates
Implementation Method 3
The radiative recombination of electron-hole pairs can be used for the generation of electromagnetic radiation (e.g., light) by the electric current in a p-n junction
Implementation Method 4
When the non-visible light is absorbed by the phosphor, the phosphor emits a visible light
Data Source
AI summary
A semiconductor device having light-emitting diodes (LEDs) formed on a concave textured substrate is provided. A substrate is patterned and etched to form recesses. A separation layer is formed along the bottom of the recesses. An LED structure is formed along the sidewalls and, optionally, along the surface of the substrate between adjacent recesses. In these embodiments, the surface area of the LED structure is increased as compared to a planar surface. In another embodiment, the LED structure is formed within the recesses such that the bottom contact layer is non-conformal to the topology of the recesses. In these embodiments, the recesses in a silicon substrate result in a cubic structure in the bottom contact layer, such as an n-GaN layer, which has a non-polar characteristic and exhibits higher external quantum efficiency.


