Corner Isolation Layer Removal for LED Chip Separation
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Solution Overview
Problem
Current methods for fabricating semiconductor light emitting devices (LEDs) face challenges in effectively isolating individual LED chips on a growth substrate, particularly in removing the corner isolation layer without damaging the sidewall P-N junctions, which affects the reliability and efficiency of the devices.
Innovation Solution
A method involving the formation of an isolation layer on epitaxial structures with conformable deposition, followed by the creation of etching channels and selective etching to remove the isolation layer at the corners, while maintaining the integrity of the sidewall P-N junctions, and optionally using a laser lift-off process for substrate separation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an isolation layer is formed on the entire epitaxial structure including corners, then complete isolation of LED chips is achieved, but current leakage occurs at the corner regions
Solution Approach 1:
The patent extracts and removes the isolation layer specifically from the corner regions where it causes current leakage, while preserving it in the street regions where it provides necessary isolation. This selective removal eliminates the harmful effect at corners while maintaining the beneficial isolation function elsewhere.
Solution Approach 2:
The patent applies different treatment to different regions of the isolation layer: removing it from corner regions to prevent current leakage while retaining it in street regions for proper isolation. This creates local quality variations in the isolation layer's presence based on functional requirements of different areas.
2Object-generated harmful factors
If the isolation layer is removed completely, then current leakage is prevented, but LED chip separation and isolation are compromised
Solution Approach 1:
The patent segments the isolation layer into two functional zones: retained isolation in street regions for chip separation and removed isolation in corner regions to prevent current leakage. This segmentation allows each region to serve its specific function without compromising the other.
3Object-generated harmful factors
If selective etching is used to remove corner isolation layer, then current leakage is prevented, but process complexity increases
Solution Approach 1:
The patent performs preliminary patterning to define etching channels that expose only the corner regions of the isolation layer before etching. This preliminary action enables selective removal of corner isolation while preserving street region isolation, achieving the desired result through a structured multi-step process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the precise removal of the corner isolation layer, enhancing the separation of LED chips and improving the reliability and efficiency of semiconductor light emitting devices by preventing current leakage and ensuring robust chip formation.
Implementation Method 1
The isolation layer can be formed on the light emitting diode (LED) structures to a uniform thickness using a conformable deposition process
Implementation Method 2
the first etching process comprises a wet chemical etching process
Implementation Method 3
the second etching process comprises a BOE etch
Implementation Method 4
a laser lift off (LLO) step wherein the growth substrate is separated from the light emitting diode (LED) structures using a laser lift off (LLO) process
Data Source
AI summary
A method for fabricating semiconductor light emitting devices (LEDs) includes forming a plurality of light emitting diode (LED) structures having sidewall P-N junctions on a growth substrate, and forming an isolation layer on the light emitting diode (LED) structures having corners at intersections of the epitaxial structures with the growth substrate. The method also includes forming an etchable covering channel layer on the isolation layer, forming a patterning protection layer on the covering channel layer, forming etching channels in the covering channel layer using a first etching process, and removing the corners of the isolation layer by etching the isolation layer using a second etching process. Following the second etching process the isolation layer covers the sidewall P-N junctions. The method can also include bonding the growth substrate to a carrier and separating the growth substrate from the light emitting diode (LED) structures using a laser lift off (LLO) process.