LED Fabrication via Cyclic Temperature Ramping
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Solution Overview
Problem
Conventional LED fabrication methods result in poor epitaxy quality of GaN layers due to high growth temperatures, leading to wide full width at half maximum (FWHM) in X-ray diffraction spectra and affected optical characteristics.
Innovation Solution
The method involves cyclic ramping of process temperatures to form quantum well layers at a lower growth temperature (T1) and barrier layers at a higher growth temperature (T2), with T1 between 700°C to 900°C and T2 between 800°C to 1100°C, and ramping rates of at least 1°C per second, to improve epitaxy quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the process temperature is substantially high during the growing process of the InGaN layers, then the growth rate is improved, but indium precipitation occurs and epitaxy quality deteriorates
Solution Approach 1:
The patent applies periodic temperature cycling during the growth process of the light emitting layer. The temperature is repeatedly raised to a high level (TH) for rapid growth of InGaN quantum well layers, then lowered to a low level (TL) for precise growth of GaN barrier layers. This periodic temperature variation enables the system to achieve both high growth rates and high epitaxy quality by optimizing temperature conditions for each specific layer type at different time intervals.
2Reliability
If the process temperature is lowered to avoid indium precipitation, then indium precipitation is avoided, but the epitaxy quality of GaN layers deteriorates with wide FWHM
Solution Approach 1:
The patent applies different temperature conditions to different layers within the light emitting layer structure. High temperature (TH) is applied locally during the growth of InGaN quantum well layers where indium precipitation needs to be prevented, while low temperature (TL) is applied locally during the growth of GaN barrier layers where high epitaxy quality is required. This spatial and temporal differentiation of temperature conditions allows each layer to be grown under its optimal temperature regime.
3Ease of manufacture
If the process temperature is maintained at a constant level, then the process is simple, but it cannot simultaneously achieve high growth rate and high epitaxy quality
Solution Approach 1:
The patent transitions from a static constant temperature process to a dynamic temperature cycling process. The temperature is continuously varied between high (TH) and low (TL) levels according to the specific growth requirements of different layers. This dynamic temperature control enables the system to adapt to changing growth conditions in real-time, achieving both rapid growth and high epitaxy quality that cannot be obtained with a fixed temperature approach.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach narrows the FWHM of X-ray diffraction spectrum peaks and enhances the optical characteristics of LEDs by improving epitaxy quality and increasing electroluminescence peak intensity.
Implementation Method 1
Conventionally, metal organic chemical vapor deposition (MOCVD) is used to form the n-type GaN layer 110, the p-type GaN layer 120, and the light emitting layer 130 of the LED 100
Implementation Method 2
a growth temperature of a plurality of quantum well layers of a light emitting layer is lower than a growth temperature of a plurality of barrier layers of the light emitting layer
Implementation Method 3
the X-ray diffraction spectrum peak of the GaN layers 132 formed at the second growth temperature TL has a wide full width at half maximum (FWHM)
Implementation Method 4
increasing electroluminescence peak intensity
Data Source
AI summary
A fabrication method of light emitting diode is provided. A first type doped semiconductor layer is formed on a substrate. Subsequently, a light emitting layer is formed on the first type doped semiconductor layer. A process for forming the light emitting layer includes alternately forming a plurality of barrier layers and a plurality of quantum well layers on the first type doped semiconductor layer. The quantum well layers are formed at a growth temperature T1, and the barrier layers are formed at a growth temperature T2, where T1<T2. Then, a second type doped semiconductor layer is formed on the light emitting layer.