LED Die Formation Using Segmented Solder and Alignment Marks

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Solution Overview

Problem

Conventional methods for forming light emitting diode (LED) dies using eutectic solder layers often result in overflow during reflow, leading to short circuits and alignment challenges due to opaque solder material and inadequate alignment marks on the substrate wafer.

Innovation Solution

A method involving the formation of alignment marks and an epitaxial layered structure on a transparent substrate wafer, with a photoresist layer and solder layer created to prevent overflow by aligning and patterning die-bonding members on the back surface, ensuring accurate dicing and bonding without side wall overflow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If eutectic solder material is used as die-bonding member, then bonding strength is improved, but overflow during reflow occurs causing short circuit

Engineering Contradiction:
Improvebonding strengthVSAvoidoverflow causing short circuit
Core Design Contradiction:
StrengthVSObject-affected harmful factors

Solution Approach 1:

The solder layer is segmented into discrete die-bonding members through photolithographic patterning. The photoresist layer is formed with openings that define the boundaries of individual die-bonding members, preventing lateral flow and confinement of solder material during reflow process, thus eliminating short circuit while maintaining bonding strength.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Alignment marks are formed on the front surface of the substrate wafer before the dicing process. These pre-formed alignment marks enable accurate positioning and alignment of the substrate wafer in the dicing apparatus, ensuring precise cutting along predetermined lines and proper alignment of die-bonding members with light emitting units.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If eutectic solder material is used, then bonding reliability is improved, but alignment becomes difficult due to opaque material

Engineering Contradiction:
Improvebonding reliabilityVSAvoidalignment difficulty
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

Alignment marks serve as an intermediary element that bridges the alignment requirement between the opaque solder material and the transparent substrate wafer. The alignment marks are formed on the front surface and can be visualized through the transparent substrate from the back surface, enabling alignment without direct visualization of the solder material itself.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The alignment marks utilize optical contrast (analogous to color changes) to enable visualization. The alignment marks have different optical properties than the surrounding substrate, allowing them to be detected and used for alignment when viewed through the transparent substrate wafer in the exposure apparatus.

Inventive Principle:
Principle #32Color changes

3Ease of manufacture

If conventional paste dispensing apparatus is used, then die attachment is achieved, but process time increases

Engineering Contradiction:
Improvedie attachment capabilityVSAvoidprocess speed
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The conventional mechanical paste dispensing apparatus is replaced with a photolithographic system. The photolithographic process uses light to pattern the photoresist layer, which then defines the die-bonding members through subsequent processing steps. This optical-based approach enables faster, more precise, and automated formation of die-bonding members compared to mechanical dispensing.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

4Measurement precision

If alignment marks are formed on front surface, then positioning is enabled, but dicing alignment is impossible due to opaque solder material

Engineering Contradiction:
Improvepositioning precisionVSAvoiddicing alignment precision
Core Design Contradiction:
Measurement precisionVSManufacturing precision

Solution Approach 1:

The alignment marks formed on the front surface serve multiple functions: they enable positioning during epitaxial growth, provide reference for dicing alignment, and facilitate subsequent photolithographic alignment. The transparency of the substrate wafer allows these marks to be utilized throughout the entire manufacturing process, including dicing, without being obscured by the solder material.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Prevents die-bonding member overflow during reflow and enables precise alignment and dicing, enhancing the reliability and efficiency of LED die formation by using transparent substrate wafers and controlled solder layer formation.

Implementation Method 1

patterning the photoresist layer so as to form a plurality of spaced apart openings in the photoresist layer using photolithographic techniques

Methodology Applied
Scientific EffectPhotolithography: Photopolymerisation

Implementation Method 2

the eutectic solder layers 19 of the light emitting diode dies 18 are pressed against a heated package substrate (not shown) to cause reflow of the eutectic solder layers 19

Methodology Applied
Scientific EffectReflow: Melting

Data Source

PatentUS9153743B2Method of forming light emitting diode dies, light emitting diode wafer and light emitting diode die
Publication Date: 2015.10.06 NICHIA CORP
  • US9153743B2 patent drawing
  • US9153743B2 patent drawing
  • US9153743B2 patent drawing

AI summary

A method of forming light emitting diode dies includes: forming an epitaxial layered structure that defines light emitting units on a front surface of a substrate wafer; forming a photoresist layer over a back surface of the substrate wafer; aligning the substrate wafer and patterning the photoresist layer so as to form openings in the photoresist layer, each of the openings having an area less than a projected area of the respective light emitting unit; forming a solder layer on the photoresist layer such that the solder layer fills the openings in the photoresist layer; removing the photoresist layer and a portion of the solder layer that covers the photoresist layer from the substrate wafer; and dicing the substrate wafer.