LED Display Device Bezel Reduction via FPCB Block Structure

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Solution Overview

Problem

Conventional LCD and OLED display devices face limitations in reducing the bezel area due to the need for sealants and encapsulation units, which restrict the miniaturization of super-size screens and increase the visibility of bezels when tiling multiple panels.

Innovation Solution

The development of an LED display device with a novel block structure that reduces the film on film (FOF) bonding pad area without via hole avoidance design, incorporating a sensor unit between LEDs to minimize space and implement additional functions, and using a flexible printed circuit board (FPCB) configuration with aligned via holes to minimize bezel size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If LCD or OLED devices are used, then high resolution and thin profile are achieved, but bezel area cannot be reduced due to sealant and encapsulation requirements

Engineering Contradiction:
Improvebezel areaVSAvoidprotection against moisture and oxygen
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent transitions from organic materials (OLED) to inorganic LED materials, fundamentally changing the material parameter to eliminate the need for encapsulation. This parameter change enables bezel area reduction while maintaining reliability, as inorganic LEDs are inherently more resistant to moisture and oxygen degradation.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention extracts and removes the encapsulation unit and sealant components that are necessary for OLED and LCD devices. By using inorganic LED materials that do not require these protective elements, the patent eliminates the sources of bezel area expansion while maintaining device reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

2Area of stationary object

If FOF bonding pad area is reduced, then bezel area is minimized, but via hole avoidance design increases layer count and complexity

Engineering Contradiction:
Improvebonding pad areaVSAvoidnumber of layers
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent segments the connection structure into first connection electrodes within blocks and second connection electrodes at block boundaries. This segmentation allows via holes to be positioned within blocks rather than requiring avoidance designs, reducing bonding pad area while maintaining manageable layer count and simplifying the overall device complexity.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for a significant reduction in bezel area, cost, and process errors, enabling the creation of larger, more stable, and high-brightness display devices with integrated sensor functions like skin care and sterilization.

Implementation Method 1

a main flexible printed circuit board (FPCB) including a plurality of light emitting diodes (LEDs) in a block on one surface

Methodology Applied
Scientific EffectLight emitting diode: Light Emitting Diode

Data Source

PatentUS20230119003A1Display device
Publication Date: 2023.04.20 LG DISPLAY CO LTD
  • US20230119003A1 patent drawing
  • US20230119003A1 patent drawing
  • US20230119003A1 patent drawing

AI summary

A display device according to an embodiment of the present disclosure includes a main FPCB including a plurality of LEDs in a block unit on one surface and a connector connected to the LEDs on the other surface, a sub-FPCB connected to the connector of the main FPCB, and a cover bottom in which the main FPCB is disposed and the sub-FPCB is connected to the outside through an open area. In each block, the plurality of LEDs is disposed in series by a plurality of first connection electrodes and second connection electrodes. Also, wherein the first and second via holes are disposed within the blocks, and one end of the first connection electrode and one end of the second connection electrode are exposed by a first via hole and a second via hole. Therefore, it is possible to reduce a routing area and a bezel area.