Synchronized LED Driver Stages for Ripple Cancellation

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing power converter systems face issues with both low frequency and high frequency ripples, particularly in LED lighting applications, which can cause visible distortions in digital imagery, and using smaller capacitors to address low frequency ripples exacerbates high frequency ripple problems.

Innovation Solution

A driving arrangement utilizing a synchronized high frequency switch mode PFC converter and regulator, where the outputs are connected in series, with synchronized high frequency switching to counteract both low and high frequency ripples, allowing for the use of smaller capacitors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a PFC boost converter is used to improve power factor, then power factor is improved, but low frequency ripple is introduced

Engineering Contradiction:

Improvepower factorVSAvoidlow frequency ripple

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a second regulator stage as an intermediary between the PFC converter and the LED load. This second regulator is specifically designed to compensate for the low frequency ripple introduced by the PFC converter, thereby maintaining the power factor improvement benefits while eliminating the harmful ripple effect.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the operating parameters of the second regulator to match and compensate for the ripple frequency and amplitude characteristics of the PFC converter output. By adjusting the switching frequency and duty cycle of the second regulator, it can generate counter-ripple that cancels out the PFC converter's low frequency ripple, thus resolving the contradiction between power factor improvement and ripple reduction.

Inventive Principle:

Principle #35Parameter changes

2Object-affected harmful factors

If synchronized high frequency switching is implemented, then high frequency ripple is reduced, but device complexity increases

Engineering Contradiction:

Improvehigh frequency rippleVSAvoidsynchronization control

Core Design Contradiction:

Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the control functions of the two converters by implementing synchronized switching where the second regulator's switching is coordinated with the PFC converter's switching. This synchronization allows both converters to work together efficiently, with their combined output ripple canceling out, thereby reducing high frequency ripple while sharing the control complexity across both stages rather than adding independent control systems.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS12439490B2Driver for driving a load, such as a LED load

Publication Date: 2025.10.07 SIGNIFY HOLDING BV

AI summary

A driving arrangement is provided for driving a load, comprising a driver input for receiving an input power and a driver output to be coupled to the load. A high frequency switch mode PFC converter converts the input power to a PFC converter power and a high frequency switch mode regulator has an output connected in series with the output of the PFC converter. A superimposed power from the PFC converter and the regulator with synchronized high frequency switching is provided to the load. This enables a high frequency ripple to be at least partially cancelled. Wherein the charging phase of the PFC converter at least partially overlaps with the first phase of the regulator in which phase the regulated power increases.