Light Emitting Device Electrode Configuration for Current Density Management

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Solution Overview

Problem

Current light emitting devices face challenges in increasing light extraction efficiency and reliability, particularly due to high current density leading to overheating and potential failure at certain p-contacts.

Innovation Solution

The design includes a light emitting device with a specific configuration of semiconductor layers, an active layer, a transparent conductive layer, and dielectric and electrode structures, where p-contacts closer to n-contacts have increased areas and curved shapes to reduce current density, and a dielectric layer is interposed between the second electrode and the active layer to minimize light absorption and enhance extraction efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If p-contacts are made with standard area configuration, then device structure is simple, but current density is high causing overheating and potential failure

Engineering Contradiction:
Improvedevice reliabilityVSAvoidcontact structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by differentiating the area of p-contacts based on their position relative to n-contacts. Specifically, p-contacts closer to n-contacts are designed with larger areas to reduce current density in high-stress regions, while p-contacts farther away maintain standard areas. This localized variation in contact area optimizes current distribution and reduces overheating risk without requiring all contacts to be uniformly large, thus balancing reliability improvement with structural simplicity.

Inventive Principle:
Principle #3Local quality

2Illumination intensity

If dielectric layer is added between second electrode and active layer, then light extraction efficiency is improved, but device structure becomes more complex

Engineering Contradiction:
Improvelight extraction efficiencyVSAvoidlayer structure complexity
Core Design Contradiction:
Illumination intensityVSDevice complexity

Solution Approach 1:

The patent introduces a dielectric layer as an intermediary between the second electrode and the active layer. This dielectric layer serves as a mediator that enhances light extraction efficiency by reducing light absorption in the metal electrode and improving optical coupling. The dielectric material acts as a buffer that allows more light to escape from the active region without being absorbed by the underlying electrode, thus improving illumination intensity while adding only a single functional layer to the device structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances light extraction efficiency and reliability by reducing the risk of overheating-induced failures and improving electrical conductivity, leading to a more stable and efficient light emitting device.

Implementation Method 1

Light emitting devices emit light converted from energy due to recombination of electrons and holes contained in semiconductors

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Implementation Method 2

a dielectric layer is interposed between the second electrode and the active layer to minimize light absorption and enhance extraction efficiency

Methodology Applied
Scientific EffectLight absorption: Absorption (EM radiation)

Data Source

PatentUS11658259B2Light emitting device
Publication Date: 2023.05.23 SAMSUNG ELECTRONICS CO LTD
  • US11658259B2 patent drawing
  • US11658259B2 patent drawing
  • US11658259B2 patent drawing

AI summary

A light emitting device is provided. The light emitting device includes a first semiconductor layer; a second semiconductor layer provided on a bottom surface of the first semiconductor layer; an active layer interposed between the first semiconductor layer and the second semiconductor layer; a dielectric layer provided on a bottom surface of the second semiconductor layer; a plurality of first n-contacts provided on a first etched surface of the first semiconductor layer; and a plurality of first p-contacts and a plurality of second p-contacts provided on the bottom surface of the second semiconductor layer. One first n-contact is disposed along a first edge region of the first semiconductor layer, one first p-contact is closer to the one first n-contact than one second p-contact, and an area of the one first p-contact is greater than an area of each of the second p-contacts.