LED Package Electrode Microstructures for Solder Containment

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Solution Overview

Problem

Conventional LED carriers experience short circuits due to soldering material flowing from bonding portions to other areas of the electrode layer, causing electrical issues.

Innovation Solution

The LED package structure features a substrate with an electrode layer having elongated microstructures or accommodating holes on the bonding portions, with a surface roughness within specific ranges (Ra 0.2-3.5 μm and Rz 0.8-2.0 μm) to contain the soldering material, preventing it from flowing to other areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If soldering material is used to fix LED chips on bonding portions, then the LED chips can be securely mounted, but the soldering material may flow outward to other portions of the electrode layer causing short circuits

Engineering Contradiction:
Improvebonding strengthVSAvoidelectrical reliability
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The bonding portion is segmented into multiple functional zones: a soldering material receiving region with microstructures that captures excess soldering material, and an LED chip mounting region. This segmentation prevents soldering material from flowing to other electrode layer portions while maintaining secure LED chip mounting.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Microstructures (such as micro-pillars or micro-holes) are introduced as intermediary elements on the bonding portion surface. These microstructures act as intermediaries to receive and contain the soldering material, preventing it from flowing outward to cause short circuits while still allowing proper LED chip fixation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Strength

If the surface of bonding portion is made rough to increase bonding strength, then LED chips can be fixed more securely, but the surface roughness control becomes more difficult

Engineering Contradiction:
Improvebonding strengthVSAvoidsurface roughness control
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The surface roughness parameters are precisely controlled within specific ranges (Ra: 0.2-3.5 μm, Rz: 0.8-2.0 μm) to optimize both bonding strength and manufacturing feasibility. This parameter optimization ensures adequate LED chip fixation while maintaining control over the surface preparation process.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The bonding portion surface undergoes preliminary treatment (such as sandblasting, chemical etching, or mechanical grinding) before LED chip mounting to achieve the desired roughness parameters. This preliminary action prepares the surface in advance to provide optimal bonding characteristics without requiring excessive roughness during assembly.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If microstructures are added to the bonding portion to contain soldering material, then short circuits are prevented, but the device complexity increases

Engineering Contradiction:
Improveelectrical reliabilityVSAvoidelectrode layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bonding portion incorporates microstructures (micro-pillars, micro-holes, or porous features) that create a controlled porous surface. These microstructures efficiently capture and contain soldering material through capillary action and surface area increase, preventing short circuits while maintaining a relatively simple overall device structure.

Inventive Principle:
Principle #31Porous materials

Solution Approach 2:

The microstructures for soldering material containment are merged with the bonding portion itself rather than being separate components. This integration combines the bonding function and soldering material containment function into a single structural element, reducing overall device complexity while maintaining electrical reliability.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10879443B2LED package structure, chip carrier, and method for manufacturing chip carrier
Publication Date: 2020.12.29 LITE ON OPTO TECH (CHANGZHOU) CO LTD
  • US10879443B2 patent drawing
  • US10879443B2 patent drawing
  • US10879443B2 patent drawing

AI summary

The present disclosure provides an LED package structure, a carrier, and a method for manufacturing a carrier. The carrier includes a substrate and an electrode layer disposed on the substrate. The electrode layer includes at least one bonding portion that has a plurality of elongated microstructures recessed in a surface thereof.