LED Epitaxy Structure Using SiC Buffer Layer for Lattice Mismatch
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Solution Overview
Problem
The high lattice mismatch between Al2O3 and GaN substrates in conventional LED epitaxial wafers leads to significant lattice dislocations and stress, resulting in low light emitting efficiency due to inefficient electron-hole recombination.
Innovation Solution
A growth method involving the deposition of a SiC buffer layer between the Al2O3 substrate and the u-GaN layer, with specific temperature, gas flow rate, and pressure conditions to reduce lattice mismatch and stress, followed by the sequential growth of additional layers to enhance light emitting efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If GaN layer is directly deposited on Al2O3 substrate, then the manufacturing process is simple, but lattice mismatch and dislocation density increase significantly
Solution Approach 1:
A SiC buffer layer is introduced as an intermediary between the Al2O3 substrate and the GaN layer. This buffer layer has a lattice constant that is intermediate between Al2O3 and GaN, gradually transitioning the lattice structure and reducing the abrupt mismatch. The SiC layer acts as a mediator that accommodates the lattice difference, significantly reducing dislocation density and improving the crystalline quality of the GaN layer without substantially complicating the manufacturing process.
2Manufacturing precision
If SiC buffer layer is deposited to reduce lattice mismatch, then crystal quality improves, but manufacturing process complexity increases
Solution Approach 1:
The patent optimizes deposition parameters including temperature (650-1550°C), pressure (100-700 torr), and gas flow rates to control the SiC buffer layer formation. By carefully adjusting these parameters, the process achieves high crystal quality GaN layers while keeping the additional process steps manageable. The parameter optimization ensures that the SiC buffer layer forms with appropriate thickness and crystalline structure, balancing quality improvement with process complexity.
3Reliability
If SiC buffer layer is deposited with optimized parameters, then light emitting efficiency improves, but production cost increases
Solution Approach 1:
The SiC buffer layer is designed as a relatively thin layer (10-1000 Å) that serves its primary function of reducing lattice mismatch and dislocation density. While SiC material cost is higher than Al2O3, the thin buffer layer minimizes material consumption. The layer is deposited using chemical vapor deposition with controlled thickness to achieve the necessary lattice transition while keeping material costs manageable, ultimately improving LED efficiency and reducing waste.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The SiC buffer layer effectively reduces lattice mismatch and dislocation density, improving the crystal quality and light emitting efficiency of LEDs while maintaining a lower production cost compared to using GaN substrates.
Implementation Method 1
the SiC buffer layer effectively reduces lattice mismatch and dislocation density, improving the crystal quality
Implementation Method 2
successively depositing and growing a SiC buffer layer and a u-GaN layer on the substrate; the temperature used for depositing the SiC buffer layer is 650 ̃1550 degrees; the gas used for depositing the SiC buffer layer is a silicon source gas and a carbon source gas
Data Source
AI summary
The present disclosure provides a growth method and structure of LED epitaxy. The growth method of LED epitaxy comprises: providing a layer of substrate, wherein the substrate is an Al2O3 substrate or an Al2O3/SiO2 composite substrate; successively depositing and growing a SiC buffer layer and a u-GaN layer on the substrate; wherein the temperature used for depositing the SiC buffer layer is 650˜1550 degrees; the gas used for depositing the SiC buffer layer is a silicon source gas and a carbon source gas, a flow rate of the silicon source gas is 1˜1000 sccm, and a flow rate of the carbon source gas is 1˜1000 sccm; a gas carrier gas used for depositing the SiC buffer layer has a flow rate of 10˜500 slm; the SiC buffer layer is deposited at a pressure of 100˜700 torr; the SiC buffer layer is deposited for a thickness of 10˜1000 A.