LED Module Fan-Out Interconnection for Flexible Display Layout

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Solution Overview

Problem

Existing LED modules lack design flexibility due to limitations in interconnection structures and insulating layers, which restricts their structural design and performance.

Innovation Solution

A light-emitting diode (LED) module with a multi-layer structure is developed, featuring a substrate, LEDs emitting light towards the substrate, upper electrodes connected to the LEDs, an upper insulating layer surrounding the electrodes, a film on glass (FOG) electrode, and a fan-out interconnection structure connecting the electrodes to the FOG electrode through the insulating layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If traditional interconnection structures are used in LED modules, then manufacturing is simpler, but design flexibility and structural freedom are limited

Engineering Contradiction:
Improvedesign flexibilityVSAvoidinterconnection structure complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements fan-out interconnection that extends electrical connections from the LED chip level to the module level through multiple insulating layers, adding vertical dimensionality to the interconnection architecture. This enables flexible routing of signal and power lines across different layers without constraining the LED chip placement geometry, thereby achieving design freedom while managing complexity through structured layering.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces an upper insulating layer as an intermediary structure that hosts fan-out electrodes and interconnection traces. This intermediate layer acts as a mediator between the LED chip electrodes and the final module-level connection points, allowing flexible signal routing and protecting the LED chips while enabling design flexibility without directly complicating the chip-level structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If LEDs are exposed without protection, then structure is simpler, but LED reliability and protection from environmental factors are reduced

Engineering Contradiction:
ImproveLED protectionVSAvoidmulti-layer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs a nested multi-layer insulating structure where the upper insulating layer encapsulates the LED chip and its electrodes, which themselves are protected by lower insulating layers. This nested arrangement provides progressive protection at each layer level, enhancing LED reliability against environmental factors while organizing the complexity into a hierarchical, manageable structure.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent uses thin film insulating layers that conformally cover and protect the LED chip and interconnection structures. These flexible thin films provide environmental protection while adapting to the underlying complex three-dimensional structures, enabling reliable encapsulation without rigid constraints that would increase structural complexity.

Inventive Principle:
Principle #30Flexible shells and thin films

3Adaptability or versatility

If fan-out interconnection is implemented, then design freedom is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvestructural design freedomVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent divides the interconnection function into segmented components distributed across multiple insulating layers: lower insulating layers for chip-level protection, upper insulating layers for fan-out routing, and separate electrode structures for signal and power distribution. This segmentation allows each layer to be optimized and manufactured independently, reducing overall manufacturing complexity while enabling flexible structural design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent resolves manufacturing complexity by moving interconnection routing to the vertical dimension through multiple insulating layers. Instead of complex planar routing that would constrain manufacturing, the fan-out interconnection utilizes vertical stacking to achieve design freedom, with each layer serving specific routing functions that can be manufactured using standard multi-layer fabrication processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution provides freedom in structural design and enhances the performance of the LED module by improving interconnection efficiency and protecting the LEDs, leading to better contrast, response time, and energy efficiency.

Implementation Method 1

light emitting diodes (LEDs) are devices that convert electrical signals into forms of light, such as infrared rays and visible light using the characteristics of compound semiconductors

Methodology Applied
Scientific EffectLight emitting diode effect: Light Emitting Diode

Data Source

PatentUS20250029969A1Light emitting diode module and display device having the same
Publication Date: 2025.01.23 SAMSUNG ELECTRONICS CO LTD
  • US20250029969A1 patent drawing
  • US20250029969A1 patent drawing
  • US20250029969A1 patent drawing

AI summary

Provided are a light emitting diode (LED) module that enables a freedom in structure design thereof using a fan-out interconnection and an insulating layer, and a display device having the same. The LED module having a multi-layer structure includes substrate; a LED located on the substrate and emitting light toward the substrate; a plurality of upper electrodes located on the LED and connected to the LED; an upper insulating layer provided to surround the plurality of upper electrodes; a film on glass (FOG) electrode located on the upper insulating layer; and a fan out interconnection structure configured to connect the plurality of upper electrodes to the FOG electrode through the upper insulating layer.