LED Filament Conversion Layer Thermal Management

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Solution Overview

Problem

Existing LED filaments with conversion layers face challenges in thermal management, leading to temperature differences between the light-generating semiconductor chips and the filament surface, which affects the efficiency and longevity of the light emission.

Innovation Solution

The LED filament design incorporates a radiation-transmissive first layer and a phosphor-containing second layer, where the phosphor is strategically placed in the outer edge region to enhance heat dissipation, and thermally conductive particles are integrated into the matrix material to improve heat conduction without compromising radiation transmissivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If phosphor is distributed uniformly throughout the LED filament, then wavelength conversion is achieved, but temperature gradient between semiconductor chip and filament surface increases

Engineering Contradiction:
Improvetemperature gradientVSAvoidthermal management
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The patent applies local quality by concentrating phosphor in the outer conversion layer rather than distributing it uniformly. The outer conversion layer contains phosphor while the inner conversion layer is phosphor-free, creating localized phosphor distribution at the filament surface where heat dissipation is most effective. This resolves the contradiction by maintaining wavelength conversion functionality while reducing the temperature gradient between the semiconductor chip and filament surface.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces a layered dimensional structure with distinct inner and outer conversion layers. This dimensional organization separates phosphor-containing regions from phosphor-free regions, allowing heat to dissipate more efficiently from the semiconductor chip through the inner layer to the outer surface, thereby reducing the temperature gradient while still achieving wavelength conversion in the outer layer.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Use of energy by moving object

If phosphor concentration is increased to improve wavelength conversion, then conversion efficiency increases, but heat generation increases leading to higher operating temperature

Engineering Contradiction:
Improveconversion efficiencyVSAvoidoperating temperature
Core Design Contradiction:
Use of energy by moving objectVSTemperature

Solution Approach 1:

The patent segments the conversion layer into an inner conversion layer without phosphor and an outer conversion layer with phosphor. This segmentation allows the system to achieve wavelength conversion in the outer layer while the inner layer serves as a thermal pathway, reducing heat accumulation and operating temperature even with adequate phosphor concentration in the outer layer for efficient conversion.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The inner conversion layer acts as an intermediary between the semiconductor chip and the phosphor-containing outer conversion layer. It provides a thermal conduction pathway that mediates heat transfer from the chip to the outer surface, allowing the phosphor in the outer layer to maintain efficient conversion without excessive heat buildup, thus balancing conversion efficiency with temperature control.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Temperature

If conversion layer is placed close to semiconductor chip to reduce temperature gradient, then heat dissipation improves, but phosphor absorption of pump light increases reducing conversion efficiency

Engineering Contradiction:
Improvetemperature gradientVSAvoidconversion efficiency
Core Design Contradiction:
TemperatureVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by placing phosphor only in the outer conversion layer away from the semiconductor chip, while the inner conversion layer adjacent to the chip remains phosphor-free. This localized phosphor placement allows the inner layer to conduct heat efficiently from the chip to the outer surface (reducing temperature gradient) while the outer layer with phosphor performs wavelength conversion without absorbing pump light that would reduce efficiency.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the temperature gradient between the semiconductor chip and the filament surface, leading to improved heat emission and a lower operating temperature for the semiconductor chips, thereby enhancing the thermal management and stability of the LED filament.

Implementation Method 1

phosphor is configured to shift a wavelength of the radiation of the semiconductor chip

Methodology Applied
Scientific EffectPhotoluminescence: Photoluminescence

Implementation Method 2

thermally conductive particles are integrated into the matrix material to improve heat conduction

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS10886258B2LED filament comprising conversion layer
Publication Date: 2021.01.05 OSRAM OLED
  • US10886258B2 patent drawing
  • US10886258B2 patent drawing
  • US10886258B2 patent drawing

AI summary

An LED filament includes semiconductor chips arranged on a top side of a radiation-transmissive carrier, and at least partly covered with a radiation-transmissive first layer, the first layer and an underside of the carrier are covered with a second layer, phosphor is provided in the second layer, the phosphor is configured to shift a wavelength of the radiation of the semiconductor chip, no phosphor or phosphor including less than 50% of the concentration of the phosphor of the second layer is provided in the first layer, the carrier is formed from a further first layer and a carrier layer having cutouts, the carrier layer is arranged on the further first layer, the semiconductor chips are arranged on the further first layer in the regional of the cutouts of the carrier layer, and the first layer and the further first layer are at least partially covered with the second layer.