Vertical-Structure LED Heat Sink Support for Micro-Crack Reduction

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Solution Overview

Problem

The existing vertical-structure semiconductor light emitting devices face challenges with micro-crack generation, wafer warpage, and low production yield due to thermal expansion coefficient differences between the sapphire substrate and conductive supports, leading to damage during the Laser Lift-Off process and subsequent fabrication processes.

Innovation Solution

A vertical-structure semiconductor light emitting device is designed with a high-performance heat sink support configured using a metallic thick film or metallic foil, which includes a bonding layer and an auxiliary support to minimize thermal and mechanical stress, thereby reducing micro-crack formation and enhancing chip yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a sapphire substrate is used as the initial growth substrate, then a predetermined lattice constant and thermal expansion coefficient matching the III-V nitride based semiconductor is achieved, but multi-layered light emitting structure thin films cannot be layered with good quality due to lattice mismatch

Engineering Contradiction:
Improvedevice reliabilityVSAvoidlight emitting structure thin film quality
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A SiC buffer layer is introduced as an intermediary between the sapphire substrate and the III-V nitride based semiconductor layers. This buffer layer serves as a transition medium that accommodates the lattice mismatch between sapphire and the semiconductor, enabling high-quality multi-layered light emitting structure thin films to be grown on the sapphire substrate while maintaining device reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs a composite structure consisting of sapphire substrate + SiC buffer layer + III-V nitride based semiconductor multi-layered light emitting structure. This composite material approach combines the advantages of sapphire (thermal stability, chemical inertness) with SiC (lattice matching, thermal conductivity) to overcome the limitations of using sapphire alone

Inventive Principle:
Principle #40Composite materials

2Temperature

If a sapphire substrate is used, then thermal conductivity is improved, but the electric insulator property causes difficulties in dealing with external static electricity and potential errors

Engineering Contradiction:
Improvethermal conductivityVSAvoidstatic electricity handling
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The patent applies local quality by making different parts of the device structure have different electrical properties. The sapphire substrate maintains its electric insulator property for thermal management, while the SiC buffer layer and III-V nitride based semiconductor layers provide electrical conductivity pathways for static electricity dissipation, allowing each layer to optimize its local function

Inventive Principle:
Principle #3Local quality

3Area of moving object

If a MESA-structure is formed on sapphire substrate, then the LED chip area is reduced to a predetermined value, but production output per 2-inch wafer is restricted

Engineering Contradiction:
ImproveLED chip areaVSAvoidproduction output per 2-inch wafer
Core Design Contradiction:
Area of moving objectVSProductivity

Solution Approach 1:

The patent segments the device structure into a compact MESA-configuration where the light emitting region is vertically stacked rather than laterally expanded. This segmentation allows multiple LED chips to be arranged more densely on a 2-inch wafer, increasing production output while maintaining small individual chip areas through the vertical heteroepitaxial growth structure

Inventive Principle:
Principle #1Segmentation

4Power

If high currents are injected to a light emitting device for a long time, then light emitting efficiency is maintained, but heat generation causes temperature inside the light emitting active layer to increase and efficiency to decrease

Engineering Contradiction:
Improvecurrent injection levelVSAvoidlight emitting efficiency
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The SiC buffer layer and sapphire substrate combination provides self-service thermal management by actively conducting heat away from the light emitting active layer during high-current operation. The SiC layer with its high thermal conductivity serves the device's thermal regulation needs, preventing temperature buildup that would otherwise reduce light emitting efficiency during sustained high-power operation

Inventive Principle:
Principle #25Self-service

5Temperature

If a metallic thick film or metallic foil is used as heat sink support, then thermal and mechanical stress is absorbed, but micro-crack generation and wafer warpage occur due to thermal expansion coefficient differences

Engineering Contradiction:
Improveheat dissipation performanceVSAvoidmicro-crack and wafer warpage
Core Design Contradiction:
TemperatureVSManufacturing precision

Solution Approach 1:

The patent optimizes the thermal expansion coefficient parameter by selecting SiC as the buffer layer material, whose thermal expansion coefficient closely matches that of the III-V nitride based semiconductor. This parameter matching minimizes thermal stress during temperature cycling, preventing micro-crack generation and wafer warpage while allowing the metallic thick film or foil to provide effective heat sinking

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces micro-crack generation and wafer warpage, allowing for improved reliability and increased production yield by providing a stable heat sink support that absorbs thermal and mechanical stress, enabling efficient chip fabrication and post-processes without thermal and mechanical damage.

Implementation Method 1

a bonding layer, formed on the metallic thick film

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

the metallic thick film or metallic foil, which includes a bonding layer and an auxiliary support to minimize thermal and mechanical stress

Methodology Applied
Scientific EffectThermal stress absorption: Stress Relaxation

Implementation Method 3

an auxiliary support to minimize thermal and mechanical stress, thereby reducing micro-crack formation

Methodology Applied
Scientific EffectMechanical stress minimization: Elasticity

Implementation Method 4

a high-performance heat sink support configured using a metallic thick film or metallic foil

Methodology Applied
Scientific EffectHeat dissipation: Heat Sink

Data Source

PatentUS8932890B2Vertical-structure semiconductor light emitting element and a production method therefor
Publication Date: 2015.01.13 SUZHOU LEKIN SEMICON CO LTD
  • US8932890B2 patent drawing
  • US8932890B2 patent drawing
  • US8932890B2 patent drawing

AI summary

The present invention relates to a vertical-structure semiconductor light emitting device and a production method thereof, more specifically, to a vertical-structure semiconductor light emitting device having a high-performance heat sink support comprising a thick metal film or metal foil. The vertical-structure semiconductor light emitting element produced in accordance with the present invention constitutes a highly reliable light emitting element with absolutely no thermal or mechanical damage since it has the high performance heatsink support and so suffers not fine micro-cracking and can be freely subjected to heat treatment and to post-processing including of a side-surface passivation thin film.