LED Packaging Structure Using Integrated Substrate to Reduce Thermal Resistance

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Solution Overview

Problem

Conventional light emitting diode (LED) packaging methods involve multiple costly steps and material expenses due to the need for substrate transfer and complex processes, which hinder integration and miniaturization, and increase thermal resistance.

Innovation Solution

A method of manufacturing an LED packaging structure using the chip's own substrate as the packaging substrate, involving epitaxy layer formation, mesa etching, conductive hole creation, electrode formation, and optical element packaging, which simplifies the process, reduces costs, and minimizes thermal resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional packaging methods with substrate transfer are used, then electrical connection and packaging function are achieved, but process complexity and manufacturing cost increase

Engineering Contradiction:
Improveelectrical connectionVSAvoidprocess steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the chip substrate and packaging substrate into a single integrated substrate. The LED chip is grown directly on the packaging substrate via epitaxy, eliminating the need for separate substrate transfer, bonding, and encapsulation steps. This integration resolves the contradiction by maintaining reliable electrical connection while dramatically reducing process complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The packaging substrate serves multiple functions simultaneously: it acts as the growth substrate for the LED chip, the mechanical support structure, the thermal management component, and the electrical connection carrier. This multi-functionality eliminates the need for separate components and processes, reducing overall device complexity while ensuring reliable operation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If conventional packaging with separate substrates is used, then chip functionality is achieved, but manufacturing cost increases

Engineering Contradiction:
Improvechip functionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

By combining the chip substrate and packaging substrate into one integrated substrate, the patent eliminates multiple manufacturing steps including substrate transfer, bonding material application, and separate encapsulation processes. This reduction in process steps directly lowers manufacturing cost while maintaining full chip functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts and eliminates the intermediate transfer substrate and bonding materials from the conventional packaging process. By growing the LED chip directly on the final packaging substrate through epitaxy, unnecessary intermediate components and processes are removed, reducing material costs and simplifying manufacturing.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If conventional packaging structure is used, then electrical connection is achieved, but packaging volume increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidpackaging volume
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The integration of chip and packaging substrates into a single substrate creates a compact unified structure. The LED chip grows directly on the packaging substrate with electrodes formed in-situ, eliminating the need for separate bonding wires, encapsulants, and mounting structures, thereby minimizing packaging volume while ensuring reliable electrical connection.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The LED chip structure is nested within the packaging substrate in a hierarchical arrangement where the active LED layers are grown directly on the substrate, with electrodes and reflective layers integrated within the same structure. This nested integration maximizes space efficiency and minimizes overall packaging volume.

Inventive Principle:
Principle #7Nested doll (Nesting)

4Reliability

If conventional packaging with multiple substrates is used, then chip support is achieved, but thermal resistance increases

Engineering Contradiction:
Improvechip supportVSAvoidthermal resistance
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

By merging the chip substrate and packaging substrate into a single continuous substrate structure, the patent creates an uninterrupted thermal conduction path from the LED active region through the epitaxy layers and directly to the packaging substrate heat sink. This eliminates thermal interface resistance at substrate-bonding interfaces, reducing overall thermal resistance while maintaining structural support.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The packaging substrate is designed as a composite structure with materials optimized for both mechanical support and thermal conduction. The substrate incorporates high thermal conductivity materials in the regions contacting the LED chip to maximize heat dissipation efficiency while maintaining structural integrity and support.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a simplified structure with lower costs, improved electrical and optical properties, and reduced thermal resistance for the LED packaging, enabling better control and efficiency.

Implementation Method 1

growing a n-type layer, an active layer and a p-type layer in turn on an insulating substrate by means of metal organic vapour phase epitaxy, forming an epitaxy layer

Methodology Applied
Scientific EffectMetal organic vapour phase epitaxy: Epitaxy

Implementation Method 2

performing a down etching at one side on the surface of the p-type layer by means of lithographic process with an etching depth so as to reach the surface of the n-type layer to form a first mesa

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS9246052B2Packaging structure of light emitting diode and method of manufacturing the same
Publication Date: 2016.01.26 INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
  • US9246052B2 patent drawing
  • US9246052B2 patent drawing

AI summary

The present disclosure relates to a light emitting diode packaging structure and the method of manufacturing the same. The light emitting diode packaging structure has an insulating substrate with through holes formed on each side of the upper surface thereof, the through hole being filled with conductive metal. Additionally, a n-type layer, an active layer, a p-type layer, an insulating layer and a p-type electrode are formed on the insulating substrate. The structure further may include a n-type electrode provided on a side of the upper surface of the n-type layer; a first back electrode provided at one side of the back surface of the insulating substrate; a second back electrode provided at the other side of back surface of the insulating substrate; and an optical element packaged on the base substrate.