LED Load Current Adjusting Circuit Using Digital Duty Cycle Counter
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Solution Overview
Problem
Existing load current adjusting circuits for LEDs face limitations in frequency range due to large resistor and capacitor sizes required for filtering, which restrict the frequency of pulse signals and introduce errors at low duty cycles, especially when external filtering is not possible within a chip/IC.
Innovation Solution
A load current adjusting circuit that includes a counter to generate digital signals representing the duty cycle of a pulse signal, and an adjusting circuit using reference voltage and current adjusting branches to control the load current, allowing for dimming without a passive filter, thus reducing chip area and cost, and maintaining high precision across a wide frequency range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a passive filter (large resistor and capacitor) is used to filter the pulse signal, then the filtering effect is improved, but the chip area and cost increase, and the frequency range is restricted
Solution Approach 1:
The patent extracts and removes the passive filter (resistor and capacitor) from the chip, placing it externally. This eliminates the need for large on-chip filtering components while maintaining the filtering function through external components, thus reducing chip area without compromising the filtering effect.
Solution Approach 2:
The patent introduces a compensation capacitor as an intermediary element that works with the counter and adjusting circuit to achieve filtering without requiring large passive filter components. The compensation capacitor, combined with the digital processing, provides the necessary filtering effect with minimal chip area occupation.
2Measurement precision
If a passive filter is used to reduce ripple, then the analog dimming signal precision is improved, but the frequency range is restricted and low duty cycle errors increase
Solution Approach 1:
The patent replaces the mechanical/passive filtering system (resistor-capacitor filter) with a digital processing system consisting of a counter and adjusting circuit. This digital system processes the pulse signal width information to generate the analog dimming signal, eliminating frequency restrictions and improving precision across a wide frequency range including low duty cycles.
Solution Approach 2:
The patent changes the operating parameters by using a fixed frequency clock signal to count the pulse signal width, rather than relying on passive filter characteristics that are sensitive to frequency changes. This parameter change enables the system to operate accurately across a wide frequency range without the limitations of passive filtering.
3Area of stationary object
If external filtering is not performed within the chip, then the chip area and cost are reduced, but filtering errors and offset voltage impacts increase
Solution Approach 1:
The patent introduces a compensation capacitor as an intermediary that, when used with the digital counter and adjusting circuit, provides the necessary signal conditioning and filtering without requiring large external passive filter components. This maintains signal accuracy while keeping the chip area small.
Solution Approach 2:
The patent replaces the need for external passive filtering with a digital processing approach using a counter and adjusting circuit. This digital system inherently provides accurate signal processing without the offset voltage and filtering errors associated with passive RC filters, achieving both small chip area and high reliability.
Data Source
AI summary
A load current adjusting circuit can include: a counter configured to generate first and second digital signals in accordance with a pulse signal, where a numerical relationship between the first and second digital signals is determined in accordance with a duty cycle of the pulse signal; and an adjusting circuit configured to adjust a load current to vary along with the duty cycle of the pulse signal in accordance with the first and second digital signals.


