LED Package Carrier Embedded Heat Conductor
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Solution Overview
Problem
Current LED package structures face issues with thermal stress and reliability due to mismatched thermal expansion coefficients between the LED chip and the package carrier, leading to potential overheating, reduced illumination, and shorter lifespan.
Innovation Solution
A package carrier is designed with a substrate, a heat conducting element embedded within, and a metal layer on the substrate to facilitate efficient heat dissipation, using an insulating material to fix the heat conducting element and reduce thermal expansion coefficient mismatch.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional LED package structure is used, then the LED chip can be packaged and protected, but thermal stress and warpage increase due to mismatched thermal expansion coefficients, reducing reliability
Solution Approach 1:
The patent introduces an intermediate layer structure between the LED chip and package carrier that acts as a thermal expansion buffer. This intermediate structure absorbs the differential thermal expansion stress, preventing direct stress transmission to the LED chip while maintaining structural integrity and reducing warpage during temperature cycling.
Solution Approach 2:
The package structure employs composite materials with carefully selected thermal expansion coefficients. By combining multiple materials with different thermal properties in a layered configuration, the overall structure achieves thermal expansion compatibility with the LED chip, significantly reducing thermal stress while maintaining mechanical strength and reliability.
2Illumination intensity
If the LED chip generates large thermal energy, then the LED can emit light, but heat dissipation becomes difficult, causing temperature rise and potential damage
Solution Approach 1:
The patent extracts and separates the heat generation function from the light emission function by directing thermal energy through dedicated thermal management pathways. Heat is extracted from the LED chip through specialized thermal vias and heat dissipation structures that conduct heat away from the active region, preventing temperature accumulation while preserving light output.
Solution Approach 2:
The package structure incorporates fluid-based thermal management systems, including thermal paste or coolant channels that facilitate efficient heat transfer from the LED chip to external heat sinks. This fluid-mediated heat transfer mechanism effectively removes thermal energy, maintaining operational temperatures and preventing thermal damage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively dissipates heat generated by the LED chip, reducing thermal stress, enhancing the reliability and longevity of the LED package by minimizing thermal expansion coefficient differences and preventing overheating.
Implementation Method 1
the heat conducting element and the metal layer of the substrate can quickly transmit the heat to the outside
Implementation Method 2
the heat conducting element is fixed in the first opening of the substrate via an insulating material
Data Source
AI summary
A manufacturing method of a package carrier is provided. A substrate having an upper and lower surface is provided. A first opening communicating the upper and lower surface of the substrate is formed. A heat conducting element is disposed inside the first opening, wherein the heat conducting element is fixed in the first opening via an insulating material. At least a through hole passing through the substrate is formed. A metal layer is formed on the upper and lower surface of the substrate and inside the through hole. The metal layer covers the upper and lower surface of the substrate, the heat conducting element and the insulating material. A portion of the metal layer is removed. A solder mask is formed on the metal layer. A surface passivation layer is formed and covers the metal layer exposed by the solder mask and the metal layer located inside the through hole.