LED Package Thermal Vias Insulating Substrate

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Solution Overview

Problem

Traditional packaging methods for light emitting semiconductor devices, such as LEDs on metal core printed circuit boards, face challenges in thermal management for high-power applications, leading to temperature control issues, reliability concerns, increased cost, and reduced packing density due to unnecessary thermal resistance and coefficient of thermal expansion mismatches.

Innovation Solution

A packaging structure that makes direct electrical and thermal connections to the LED chip using metalized vias for improved heat transfer, with a conductor layer extending through vias in an insulating substrate to provide efficient thermal pathways, and an encapsulant surrounding the LED chip for protection and light transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional MCPCB packaging with dielectric material layer is used, then electrical insulation is provided, but thermal resistance increases and heat transfer efficiency deteriorates

Engineering Contradiction:

Improveelectrical insulationVSAvoidthermal resistance

Core Design Contradiction:

ReliabilityVSTemperature

Solution Approach 1:

The patent segments the thermal management function by introducing separate thermal vias through the dielectric layer, allowing heat to conduct vertically through dedicated pathways while maintaining electrical insulation through the dielectric material surrounding the vias

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent uses thermally conductive adhesive material as an intermediary between the LED chip and the MCPCB, improving heat transfer efficiency while the dielectric layer with thermal vias acts as another intermediary to conduct heat from the chip to the heat sink

Inventive Principle:

Principle #24Intermediary (Mediator)

2Strength

If MCPCB with metal baseplate and dielectric layer is used, then structural support is provided, but package size and thickness increase

Engineering Contradiction:

Improvestructural supportVSAvoidpackage thickness

Core Design Contradiction:

StrengthVSLength of stationary object

Solution Approach 1:

The patent employs a thin dielectric layer with integrated thermal vias instead of a thick traditional MCPCB structure, reducing overall package thickness while maintaining structural support through the metal baseplate and optimized layer configuration

Inventive Principle:

Principle #30Flexible shells and thin films

3Reliability

If wirebonding or flip-chip attachment is used, then electrical connection is established, but device complexity and manufacturing cost increase

Engineering Contradiction:

Improveelectrical connectionVSAvoidattachment process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the electrical connection and thermal management functions by integrating thermal vias directly into the dielectric layer, eliminating the need for separate wirebonding or flip-chip attachment processes and simplifying the overall device structure

Inventive Principle:

Principle #5Merging (Combining)

4Ease of manufacture

If traditional packaging substrate is used, then LED chip mounting is enabled, but packing density is reduced

Engineering Contradiction:

Improvechip mounting capabilityVSAvoidpacking density

Core Design Contradiction:

Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent utilizes vertical thermal vias through the dielectric layer to improve heat transfer in the vertical dimension, enabling better thermal management without increasing horizontal footprint, thus allowing higher packing density

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances thermal performance, reduces junction temperatures, and increases reliability and packing density while maintaining a compact and low-cost package, overcoming the limitations of traditional MCPCB-based packaging.

Implementation Method 1

a conductor layer positioned on the bottom surface of the insulating substrate layer and in the plurality of vias, the conductor layer in direct contact with the connection pads of the at least one LED chip so as to be electrically and thermally connected thereto

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS10957832B2Electronics package for light emitting semiconductor devices and method of manufacturing thereof

Publication Date: 2021.03.23 RUSHMORE TECHNOLOGIES LLC

AI summary

A light emitting semiconductor (LES) device having desirable thermal performance characteristics is disclosed. The LES device includes an insulating substrate layer having a plurality of vias formed therein and at least one LES chip mounted on the insulating substrate layer, with each of the LES chips(s) including an active surface including a light emitting area configured to emit light therefrom and a back surface positioned on a top surface of the insulating substrate layer and including connection pads thereon. A conductor layer is positioned on a bottom surface of the insulating substrate layer and in the vias, the conductor layer in direct contact with the connection pads of the LES chip(s) so as to be electrically and thermally connected thereto. An encapsulant is positioned adjacent the top surface of the insulating substrate layer and surrounding at least part of the LES chip(s), the encapsulant comprising a light transmitting material.