LED Reflective Via Structure for Light Extraction and Current Spreading
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Solution Overview
Problem
Conventional LED designs face challenges in light extraction efficiency due to the removal of a substantial portion of the active layer for electrode formation, which compromises the surface area needed for wire bonding and affects the overall performance.
Innovation Solution
A semiconductor light-emitting device with a semiconductor stack featuring depressions that expose the second semiconductor layer, allowing for the formation of contact structures and pad portions on the first surface, while maintaining a patterned metal layer that covers the periphery surface, enhancing current spreading and light extraction efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a substantial portion of the active layer is removed to form electrodes, then the electrode formation is simplified, but the light extraction efficiency is lowered
Solution Approach 1:
The patent transitions from planar electrode formation to three-dimensional vertical electrode structures by forming holes through the active layer and growing vertical semiconductor structures within these holes. This dimensional change allows electrodes to access the n-type layer without removing large portions of the active layer, thereby maintaining light extraction efficiency while simplifying electrode formation.
Solution Approach 2:
The patent embeds vertical semiconductor structures (including electrodes) within holes formed in the active layer. The electrodes are nested within the vertical structures, which are themselves nested within the active layer matrix. This nesting approach provides sufficient surface area for wire bonding while preserving the overall integrity and light extraction capability of the active layer.
2Ease of manufacture
If the active layer surface area is reduced for electrode formation, then the manufacturing process is simplified, but the current spreading is compromised
Solution Approach 1:
The patent employs vertical growth of semiconductor structures within holes to create three-dimensional current pathways. This vertical dimension provides extended surface area for current injection and spreading without reducing the planar footprint of the active layer, thereby maintaining both manufacturing simplicity and current spreading performance.
3Reliability
If wire bonding requires sufficient surface area, then the connection reliability is improved, but the light extraction efficiency is lowered
Solution Approach 1:
The patent utilizes vertical structures growing from the n-type layer to provide adequate wire bonding surface area in the vertical dimension rather than consuming horizontal surface area. This allows wire bonds to be formed on the vertical faces of the structures without compromising the active layer's light extraction surface area.
Solution Approach 2:
The wire bonding surfaces are nested within the vertical semiconductor structures that grow within holes in the active layer. This nested configuration provides sufficient bonding area while keeping the overall device footprint and active layer surface area intact for optimal light extraction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves light extraction efficiency and current spreading by maintaining a larger active layer surface area, reducing total internal reflection, and optimizing the contact and pad structures for better electrical and optical performance.
Implementation Method 1
Light-emitting diode (LED) is widely applied to optical display apparatus, traffic lights, data storage apparatus, communication apparatus, lighting apparatus, and medical equipment
Implementation Method 2
improves light extraction efficiency and current spreading by maintaining a larger active layer surface area, reducing total internal reflection
Data Source
AI summary
A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.