Stacked LED Sub-Units With Protected Electrodes for Micro-LED Handling

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Solution Overview

Problem

The challenge in manufacturing micro-LED displays lies in the complexity and time required for mounting hundreds of thousands or millions of small LED chips, which are difficult to handle due to their small size and vulnerable structure, leading to issues during transferring and mounting processes.

Innovation Solution

A light emitting chip with a stacked structure comprising multiple LED sub-units connected by bonding layers and elongated connection electrodes, protected by a passivation layer, which simplifies the mounting process and enhances handling during manufacturing by providing structural reinforcement and protection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If individual LED chips are arranged on a two-dimensional plane for each sub-pixel, then color display capability is achieved, but the number of LED chips required becomes very large (hundreds of thousands or millions), increasing mounting complexity and time

Engineering Contradiction:
Improvecolor display capabilityVSAvoidmounting complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent transitions from a two-dimensional arrangement of individual LED chips to a three-dimensional stacked structure where multiple LED chips are vertically arranged. This dimensional change allows multiple sub-pixels (red, green, blue) to be integrated into a single vertical stack, reducing the number of chips required from hundreds of thousands to a manageable number while maintaining full color display capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent merges multiple individual LED chips (red, green, blue sub-pixels) into a single integrated stacked structure. By combining these chips vertically with bonding layers and connection electrodes, the system reduces mounting complexity while preserving the ability to display various colors through the coordinated operation of stacked LEDs.

Inventive Principle:
Principle #5Merging (Combining)

2Area of moving object

If micro-LED chips are made very small (surface area about 10,000 square μm or less) to increase display resolution, then display density is improved, but handling becomes difficult due to small size and vulnerable structure

Engineering Contradiction:
Improvechip sizeVSAvoidhandling ease
Core Design Contradiction:
Area of moving objectVSEase of operation

Solution Approach 1:

The patent addresses the handling difficulty of tiny micro-LED chips by stacking them vertically. This three-dimensional arrangement allows extremely small chips (10,000 square μm or less) to be integrated into a robust stacked structure that is easier to handle and mount as a unit, while maintaining high display resolution due to the small individual chip size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the display into stacked modules where each stack contains multiple sub-pixels. This segmentation allows the handling and mounting of entire stacks rather than individual microscopic chips, improving ease of operation while maintaining high resolution through the small size of individual chips within each stack.

Inventive Principle:
Principle #1Segmentation

3Productivity

If the number of LED chips per pixel is reduced through stacked structure, then mounting time is reduced, but structural stability during handling becomes a concern

Engineering Contradiction:
Improvemounting speedVSAvoidstructural stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent achieves both reduced mounting time and improved structural stability by vertically stacking LED chips. This three-dimensional configuration reduces the number of chips to be mounted (increasing productivity) while the vertical stacking with bonding layers creates a unified structure that is more stable during handling compared to分散 two-dimensional arrangements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs preliminary bonding actions where LED chips are pre-connected through bonding layers and connection electrodes to form stable stacked structures before mounting. This preliminary structuring ensures structural stability during handling while reducing the overall mounting time since the stacks are pre-assembled and ready for installation.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If connection electrodes are made elongated to improve electrical connection, then electrical connectivity is enhanced, but the electrodes become more vulnerable to damage during handling

Engineering Contradiction:
Improveelectrical connectivityVSAvoidelectrode strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent positions connection electrodes in three-dimensional space within the stacked structure, allowing them to extend vertically and connect multiple LED chips. This spatial arrangement enhances electrical connectivity across the stack while the electrodes are protected by surrounding bonding layers and encapsulation, preventing damage during handling.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent provides protective bonding layers and encapsulation structures that cushion and protect the connection electrodes before they are subjected to handling stresses. This beforehand protection ensures that the elongated electrodes maintain their electrical connectivity function without being damaged during the mounting and handling processes.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS11855121B2LED chip and manufacturing method of the same
Publication Date: 2023.12.26 SEOUL VIOSYS CO LTD
  • US11855121B2 patent drawing
  • US11855121B2 patent drawing
  • US11855121B2 patent drawing

AI summary

A light emitting chip including a first LED sub-unit, a second LED sub-unit disposed on the first LED sub-unit, a third LED sub-unit disposed on the second LED sub-unit, a first bonding layer interposed between the first and second LED sub-units, a second bonding layer interposed between second and third LED sub-units, and a first connection electrode electrically connected to and overlapping at least one of the first, second, and third LED sub-units, the first connection electrode having first and second opposing side surfaces, the first side surface having a first length and the second side surface having a second length, in which the difference in length between the first side surface and the second side surface of the first connection electrode is greater than a thickness of at least one of the LED sub-units.