LED Display Transfer Substrate Connection Reduction

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Solution Overview

Problem

The existing image display devices with LEDs face challenges in reducing the number and density of electrical connection elements on the transfer substrate to enable individual control of each sub-pixel, leading to a high number of connection elements required for efficient operation.

Innovation Solution

Each elementary chip integrates multiple sub-pixels, with individual brightness adjustment signals being time multiplexed onto a single connection terminal, allowing the internal selection circuit to demultiplex and apply bias signals to each LED, reducing the number of external connection elements needed on the transfer substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If each sub-pixel is controlled by separate electrical connection elements on the transfer substrate, then individual control precision is improved, but the number and density of connection elements increases

Engineering Contradiction:
Improvecontrol precisionVSAvoidnumber of connection elements
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

Multiple sub-pixel control functions are merged into a single connection terminal through time-division multiplexing. The transfer substrate carries multiple sequential control signals (red, green, blue sub-pixel signals) through one shared connection path, eliminating the need for separate connection elements for each sub-pixel while maintaining individual control capability through temporal separation of signals.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The control system employs periodic time-division multiplexing where different sub-pixel control signals are transmitted sequentially at different time intervals through the same connection terminal. This periodic action allows single-terminal control of multiple sub-pixels by assigning each sub-pixel a specific time slot for signal transmission.

Inventive Principle:
Principle #19Periodic action

2Device complexity

If the number of electrical connection elements is reduced, then device complexity is decreased, but control capability over sub-pixels is compromised

Engineering Contradiction:
Improveconnection element densityVSAvoidsub-pixel control capability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

Time-division multiplexing enables a single connection terminal to provide individual control to multiple sub-pixels by transmitting control signals sequentially in periodic time slots. Each sub-pixel receives its dedicated control signal during its assigned time interval, maintaining full control capability despite the reduction in connection element quantity.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The control circuit on the active substrate acts as an intermediary that receives sequential control signals through the single connection terminal and distributes them to the appropriate sub-pixels. This intermediary function enables the transfer substrate to use fewer connection elements while the control substrate maintains comprehensive sub-pixel control through signal routing and timing management.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP3965153B1Device for LED emissive image display
Publication Date: 2023.07.05 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • EP3965153B1 patent drawingFigure 1~2
  • EP3965153B1 patent drawingFigure 3~4
  • EP3965153B1 patent drawingFigure 5

AI summary

The invention relates to a display device comprising a transfer substrate (1010) having electrical connection elements (L1, L2, C1, C2, P1, P2, P3, P4), and a plurality of semiconductor chips, in which the transfer substrate (1010) comprises an insulating plate, the electrical connection elements of the substrate being formed by printing, on one face of said plate, a first conductive level, followed by an insulating level, followed by a second conductive level, the electrical connection elements of the substrate comprising: a plurality of first conductive tracks (L1, L2) formed in the first conductive level; a plurality of second conductive tracks (C1, C2) formed in the second conductive level; and for each chip of the device, a plurality of electrical connection areas (P1, P2, P3, P4) connected respectively to connection terminals of the chip, said areas being all formed in the second conductive level.