LED Unit Stacking for High-Density Light-Emitting Packages
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Solution Overview
Problem
Conventional high voltage chip on board (COB) light sources face challenges in reducing the total light-emitting area and achieving thermoelectric separation due to the spacing requirements of LED vertical chips, limiting optical power density and packaging efficiency.
Innovation Solution
A light-emitting device with a lead frame and insulating substrate supporting light-emitting units, where adjacent units are electrically connected through bonding wires and extension pieces, allowing for clearances as small as 30 μm, and a conductive structure for heat dissipation, enhancing optical power density and thermoelectric separation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LED vertical chips are spaced apart by at least 50 μm for electrical isolation, then electrical isolation is achieved, but the total light-emitting area cannot be reduced and optical power density cannot be improved
Solution Approach 1:
The patent transitions from horizontal spacing between chips to vertical stacking of light-emitting units. Multiple light-emitting units are stacked vertically on the same substrate area, with electrical isolation achieved through insulating layers between stacked units rather than horizontal spacing. This dimensional change allows much smaller clearances (≤30 μm) while maintaining isolation and significantly reducing the total light-emitting area.
Solution Approach 2:
The patent implements a nested structure where light-emitting units are stacked vertically one on top of another, with each unit containing semiconductor layers, active layers, and electrodes nested within a compact vertical architecture. The extension pieces and insulating layers are nested within the vertical stack, allowing dense packing while maintaining electrical isolation.
2Reliability
If LED vertical chips are spaced apart for electrical isolation, then electrical isolation is achieved, but packaging difficulty increases for thermoelectric separation
Solution Approach 1:
The patent moves from horizontal chip spacing to vertical stacking, enabling thermoelectric separation through the vertical dimension. Heat can be dissipated through the substrate and insulating layers in the vertical direction, while electrical isolation is achieved through insulating layers between stacked units. This approach simplifies packaging by providing clear thermal management pathways.
Solution Approach 2:
The patent introduces insulating layers as intermediary structures between stacked light-emitting units. These insulating layers serve dual functions: providing electrical isolation between units while also facilitating thermal management by acting as thermal pathways to the substrate. This intermediary structure simplifies the packaging process for thermoelectric separation.
3Area of moving object
If light-emitting units are arranged with clearances not greater than 30 μm, then light-emitting area is reduced and optical power density is improved, but electrical isolation becomes more difficult to achieve
Solution Approach 1:
The patent achieves electrical isolation not through horizontal spacing but through vertical insulating layers between stacked units. This allows clearances between adjacent units to be reduced to ≤30 μm while maintaining reliable electrical isolation through the insulating layers positioned vertically between units.
Solution Approach 2:
The patent introduces insulating layers as intermediary structures between stacked light-emitting units. These insulating layers provide electrical isolation even when units are closely spaced (≤30 μm clearance), enabling high optical power density while maintaining reliability through the intermediary insulating barrier.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces the light-emitting area and improves optical power density while effectively dissipating heat, enabling high current density operation and efficient thermoelectric separation.
Implementation Method 1
The conductive structure includes a first electrically connecting layer which is electrically connected to the first semiconductor layer and a second electrically connecting layer which is electrically connected to the second semiconductor layer. The first electrically connecting layer and the second electrically connecting layer are separated and insulated from each other through an insulating layer.
Implementation Method 2
The first electrically connecting layer and the second electrically connecting layer are separated and insulated from each other through an insulating layer.
Implementation Method 3
The at least one first electrode is electrically connected to the first semiconductor layer of a first one of the light-emitting units, and is electrically connected to the patterned conductive layer through at least one first bonding wire.
Data Source
AI summary
A light-emitting device includes a lead frame and a light-emitting element. The light-emitting element includes an insulating substrate, light-emitting units, a first electrode, and a second electrode. Each of the light-emitting units includes an epitaxial structure and a conductive structure. The epitaxial structure includes a first semiconductor layer, an active layer and a second semiconductor layer. The conductive structure includes a first electrically connecting layer and a second electrically connecting layer including first extension pieces and second extension pieces. In one light-emitting unit, the first extension pieces are in contact with the second semiconductor layer, the second extension pieces are in contact with the first electrically connecting layer in a next light-emitting unit so that the one and next light-emitting units are electrically connected in series, and the one and next light-emitting units define therebetween a clearance not greater than 30 μm.


