LED Encapsulant Via Etching for Fine-Pitch Interconnects

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Solution Overview

Problem

The semiconductor industry faces challenges in integrating optical features with semiconductor devices, particularly in forming conductive vias between light emitting diodes (LEDs) while maintaining a fine pitch and high aspect ratio, and avoiding collapsed vias.

Innovation Solution

The solution involves forming conductive vias after attaching the light emitting diodes to a substrate, using a photosensitive encapsulant like low temperature polyimide (LTPI), and creating openings in the encapsulant through etching rather than development, allowing for finer pitch and higher aspect ratio vias.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conductive vias are formed using conventional development methods, then the process is simple, but the pitch is coarse and aspect ratio is limited

Engineering Contradiction:
Improvevia pitch and aspect ratioVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent changes the fundamental parameter of how openings are formed in the encapsulant by switching from photoresist development to direct etching of the encapsulant material. This enables finer pitch and higher aspect ratio vias by using etching processes that can maintain vertical sidewalls and precise dimensional control, rather than being limited by photoresist thickness and development constraints

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the photochemical development process with a direct etching process. Instead of using photoresist coating, exposure, and development steps, the encapsulant itself is etched to form openings, substituting a chemical/mechanical etching system for a photochemical system, thereby achieving superior via geometry

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If vias are formed with finer pitch and higher aspect ratio, then integration density improves, but via collapse becomes more likely

Engineering Contradiction:
Improvevia pitch and aspect ratioVSAvoidvia structural stability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent performs preliminary actions by forming the encapsulant structure with appropriate mechanical properties before via formation. The encapsulant is prepared in advance to provide structural support during the via formation process, preventing collapse of high aspect ratio vias through its inherent mechanical strength and flexibility

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes the encapsulant as a flexible protective shell that conforms to the via structure. The encapsulant material acts as a flexible film that provides mechanical support to the high aspect ratio vias, preventing collapse while allowing the fine pitch geometry to be maintained

Inventive Principle:
Principle #30Flexible shells and thin films

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the likelihood of collapsed conductive vias and enables the formation of vias with a finer pitch and higher aspect ratio, enhancing the integration density and efficiency of semiconductor devices with optical features.

Implementation Method 1

a photosensitive encapsulant, such as a low temperature polyimide (LTPI), is formed around and on the light emitting diodes. Openings are formed in the photosensitive encapsulant by an etching process

Methodology Applied
Scientific EffectPhotochemical reaction: Photopolymerisation

Data Source

PatentUS12302677B2Semiconductor device and method
Publication Date: 2025.05.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12302677B2 patent drawing
  • US12302677B2 patent drawing
  • US12302677B2 patent drawing

AI summary

In an embodiment, a device includes: an interconnect structure including a first contact pad, a second contact pad, and an alignment mark; a light emitting diode including a cathode and an anode, the cathode connected to the first contact pad; an encapsulant encapsulating the light emitting diode; a first conductive via extending through the encapsulant, the first conductive via including a first seed layer, the first seed layer contacting the second contact pad; a second conductive via extending through the encapsulant, the second conductive via including a second seed layer, the first seed layer and the second seed layer including a first metal; and a hardmask layer between the second seed layer and the alignment mark, the hardmask layer including a second metal, the second metal different from the first metal.