Wafer-Level LED Binning and Substrate Removal
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Solution Overview
Problem
Existing LED fabrication methods are costly and inefficient due to chip-level binning and high thermal resistance from growth substrates like sapphire, which impairs LED performance and increases power consumption.
Innovation Solution
The method involves growing epitaxial layers on a wafer, performing wafer-level measurements and binning, dicing, and bonding the LED dies to a silicon substrate with higher thermal conductivity to improve heat dissipation, while removing the growth substrate to reduce thermal resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If chip-level binning is used for LED measurement and sorting, then measurement accuracy is improved, but manufacturing time and cost increase
Solution Approach 1:
The patent segments the measurement process into two stages: wafer-level preliminary measurement for quick sorting and chip-level detailed measurement for final verification. This segmentation allows most dies to be sorted efficiently at the wafer level while maintaining measurement accuracy through subsequent chip-level verification of selected dies.
Solution Approach 2:
The patent performs preliminary measurement and sorting of LED dies at the wafer level before dicing and packaging. This preliminary action identifies and separates dies with desired properties early in the manufacturing process, reducing the number of dies that require time-consuming chip-level measurement and sorting later.
2Manufacturing precision
If growth substrate like sapphire is used for LED fabrication, then epitaxial layer growth is improved, but thermal dissipation capability deteriorates
Solution Approach 1:
The patent extracts the growth substrate (sapphire) from the final LED chip structure after the epitaxial layers have been successfully grown. The LED dies are diced and packaged with the growth substrate removed, eliminating the thermal resistance barrier while preserving the high-quality epitaxial layers that were grown on the sapphire substrate.
Solution Approach 2:
The growth substrate serves as a temporary intermediary during the epitaxial growth process. It enables precise control of layer formation and crystal structure during manufacturing, then is removed after serving its purpose, allowing the final device to achieve both manufacturing precision and thermal performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs, enhances LED performance by improving thermal dissipation, and allows for more efficient sorting and packaging of LED chips.
Implementation Method 1
Light emitting diodes (LEDs) are P/N diodes that emit light when voltages are applied across the P/N junctions
Implementation Method 2
bonding the diced LED dies to a silicon substrate with higher thermal conductivity to improve heat dissipation
Data Source
AI summary
The present disclosure relates to methods for performing wafer-level measurement and wafer-level binning of LED devices. The present disclosure also relates to methods for reducing thermal resistance of LED devices. The methods include growing epitaxial layers consisting of an n-doped layer, an active layer, and a p-doped layer on a wafer of a growth substrate. The method further includes forming p-contact and n-contact to the p-doped layer and the n-doped layer, respectively. The method further includes performing a wafer-level measurement of the LED by supplying power to the LED through the n-contact and the p-contact. The method further includes dicing the wafer to generate diced LED dies, bonding the diced LED dies to a chip substrate, and removing the growth substrate from the diced LED dies.