Level Acquisition Circuit With Dynamic Time Constant for DC Offset Removal

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Solution Overview

Problem

In gigabit passive optical networks, the upstream channel faces challenges with asynchronous, out-of-phase, and amplitude-variant optical signals from multiple ONUs, leading to significant DC offset issues that existing technologies struggle to compensate for efficiently, especially in burst mode transmission.

Innovation Solution

A level acquisition circuit with a dynamic time constant is introduced, utilizing a switched resistance network and variable capacitors to dynamically adjust the time constants of an RC circuit, effectively removing DC offsets from differential signals in a controlled and rapid manner, ensuring minimal jitter and improved throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a fixed time constant is used in the level acquisition circuit, then the circuit design is simple, but the DC offset compensation is slow and cannot adapt to burst mode transmission requirements

Engineering Contradiction:
ImproveDC offset compensation speedVSAvoidcircuit complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent applies the dynamics principle by transforming the fixed time constant into a dynamic, adjustable time constant. The level acquisition circuit uses a switched capacitor network controlled by a microcontroller to vary the time constant based on signal conditions. This allows the circuit to adapt its DC offset compensation speed to match burst mode transmission requirements, resolving the contradiction between compensation speed and circuit complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements parameter changes by modifying the time constant parameter of the RC circuit dynamically. Through the switched capacitor network, the effective capacitance value changes based on control signals, thereby adjusting the time constant to optimize DC offset compensation performance for different burst transmission scenarios while maintaining manageable circuit complexity.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If a dynamic time constant is implemented, then the DC offset compensation accuracy is improved, but the circuit complexity increases

Engineering Contradiction:
ImproveDC offset compensation accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a microcontroller as an intermediary element that manages the complexity of the dynamic time constant implementation. The microcontroller generates control signals for the switched capacitor network based on signal detection, thereby achieving precise DC offset compensation without requiring complex hardwired control logic. This intermediary approach improves measurement precision while keeping the overall circuit architecture manageable.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dynamic time constant implementation uses switched capacitors controlled by microcontroller-generated signals to adapt the circuit's time constant in real-time. This dynamic adjustment enables precise DC offset compensation for varying burst mode signal conditions while maintaining reasonable circuit complexity through software-controlled management rather than complex hardware design.

Inventive Principle:
Principle #15Dynamics

3Productivity

If the DC offset is removed quickly, then the throughput is improved, but signal stability may be compromised

Engineering Contradiction:
Improvedata reception throughputVSAvoidsignal stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent applies dynamics by implementing a variable time constant that adapts based on the transmission phase. During burst preamble, a shorter time constant enables quick DC offset removal to maximize throughput. During data transmission, the time constant extends to maintain signal stability. This dynamic adjustment resolves the contradiction between throughput improvement and signal stability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The level acquisition circuit operates in periodic phases corresponding to the burst mode transmission structure. During the preamble phase, the circuit actively removes DC offset with a shorter time constant to enable quick data reception. During the data phase, the circuit maintains signal stability with an extended time constant. This periodic operation pattern allows the system to achieve both high throughput and signal stability at appropriate times.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The dynamic time constant adjustment in the level acquisition circuit efficiently compensates for DC offsets in a short time frame, enhancing the accuracy and efficiency of burst mode data reception by maintaining signal stability within tight amplitude limits, thus improving the overall performance of the OLT in gigabit passive optical networks.

Implementation Method 1

dynamically adjust the time constants of an RC circuit, effectively removing DC offsets from differential signals

Methodology Applied
Scientific EffectRC circuit time constant:

Data Source

PatentEP3694120B1Dynamic time constant for quick decision level acquisition
Publication Date: 2024.01.10 SEMTECH CORP
  • EP3694120B1 patent drawingFigure 1~2
  • EP3694120B1 patent drawingFigure 3
  • EP3694120B1 patent drawingFigure 4

AI summary

A circuit controls a dynamic time constant to remove DC offset from a received optical data signal. The circuit has a first capacitor coupled between a first terminal and a second terminal. A first resistance network is coupled between the second terminal and a reference voltage. A control circuit has a first output coupled to a control input of the first resistance network. The control circuit monotonically increases an effective resistance of the first resistance network to increase the dynamic time constant. The first resistance network has a resistor coupled to the second terminal, and a transistor with a first conduction terminal coupled to the resistor, a second conduction terminal coupled to the reference voltage, and a control terminal coupled to the first output of the control circuit. The first capacitor has a variable capacitance. The monotonic increase in the dynamic time constant can be linear or non-linear.