Level Adjusting Circuit for GaN Gate Drivers
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Solution Overview
Problem
Existing gate driving devices lack the ability to adjust the voltage of driving signals effectively, limiting their versatility in testing and optimizing semiconductor devices with varying performance requirements under different conditions.
Innovation Solution
A level adjusting circuit incorporating a parallel resistor-capacitor (RC) sub-circuit and an adjustable voltage supply with diodes, connected to a gate driver circuit, allows for the adjustment of driving signal voltage levels by altering the adjustable voltage supply, enabling the gate driving device to output adjusted driving signals with multiple voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional gate driver is used without voltage adjustment circuitry, then the device complexity is low, but the adaptability to different voltage requirements is poor
Solution Approach 1:
A level adjusting circuit is introduced as an intermediary component between the gate driver and the GaN device. This circuit includes voltage adjustment circuitry with adjustable voltage supply and level shifting components that mediate the voltage level mismatch, allowing the gate driver to output signals at one voltage level while the GaN device operates at a different voltage level, thereby resolving the contradiction between maintaining simple driver design and achieving voltage adaptability
Solution Approach 2:
The level adjusting circuit enables dynamic parameter changes by allowing adjustment of voltage levels through adjustable voltage supply and level shifting mechanisms. The circuit can modify the voltage amplitude and level of the driving signal to match different GaN device requirements, achieving versatility in voltage adaptation while keeping the base gate driver design relatively simple
2Productivity
If the gate driver outputs fixed voltage levels, then the device complexity is low, but the productivity in testing multiple device types is reduced
Solution Approach 1:
The level adjusting circuit provides multi-functionality by enabling the gate driver to test multiple types of GaN devices with different voltage requirements using a single unified circuit architecture. The adjustable voltage supply and level shifting capabilities allow the same hardware to adapt to various testing scenarios, improving productivity without requiring separate dedicated drivers for each device type, thus balancing complexity with enhanced testing capability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables the gate driving device to operate across a wide range of applications, facilitating benchmarking and optimizing device performance by adjusting voltage levels to suit specific requirements, thereby enhancing system-level reliability and robustness.
Implementation Method 1
a parallel resistor-capacitor (RC) sub-circuit that includes an input capacitor and an input resistor that are connected in parallel
Implementation Method 2
the parallel RC sub-circuit including an input node electrically connected to a driving signal source for receiving a driving signal therefrom, and an output node that outputs an adjusted driving signal
Implementation Method 3
a first diode and an adjustable voltage supply that are electrically connected, the first diode being further electrically connected to the output node
Data Source
AI summary
A level adjusting circuit includes a parallel resistor-capacitor (RC) sub-circuit, a first diode and an adjustable voltage supply. The RC sub-circuit includes an input capacitor and an input resistor, and includes an input node electrically connected to a driving signal source for receiving a driving signal therefrom, and an output node that outputs an adjusted driving signal. The first diode and the adjustable voltage supply are electrically connected, and are further electrically connected to the output node and a reference voltage node, respectively.