Level-Converting Flip-Flop With Integrated Pulse Generator
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Solution Overview
Problem
In mobile systems, the increased need for semiconductor devices operating at lower voltages to conserve power leads to higher power consumption due to the requirement of multiple level converters, which also reduces flip-flop operating speeds and increases system area and power consumption.
Innovation Solution
A flip-flop design that integrates a level-converting pulse generator with both output and clock input terminals, utilizing multiple supply voltages to enable simultaneous pulse generation and level conversion, reducing the need for additional level converters and minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple level converters are used to interface between higher voltage critical path and lower voltage non-critical path, then voltage level compatibility is improved, but power consumption increases and system area increases
Solution Approach 1:
The patent combines the level converter function with the flip-flop circuit by integrating level conversion circuitry directly into the flip-flop structure. This merging eliminates the need for separate level converter components, thereby reducing system area and power consumption while maintaining voltage level compatibility between critical and non-critical paths
Solution Approach 2:
The flip-flop is designed to perform multiple functions simultaneously: data latching/storage and voltage level conversion. By making the flip-flop universal (capable of both operations), the patent eliminates the need for dedicated level converter components, reducing overall system power consumption and area while maintaining adaptability to different voltage domains
2Use of energy by stationary object
If flip-flops operate at lower supply voltage to reduce power consumption, then power consumption decreases, but operating speed reduces
Solution Approach 1:
The patent applies different voltage levels to different parts of the flip-flop circuit based on their functional requirements. Critical path elements operate at higher voltage to maintain speed, while non-critical elements operate at lower voltage to save power. This local differentiation of voltage quality allows the system to achieve both low power consumption and high operating speed simultaneously
3Device complexity
If level converters are added to output terminals of flip-flops to reduce the number of level converters, then system area and power consumption should decrease, but the patent indicates both area and power consumption increase
Solution Approach 1:
The level conversion functionality is merged directly into the flip-flop circuit structure rather than being implemented as separate output stage components. This integration combines the latching function and level conversion function into a single unified circuit block, eliminating the need for additional standalone level converters and thereby reducing both system area and power consumption
Data Source
AI summary
Provided is a level converting flip-flop for clustered voltage scaling and a level-converting pulse generator for use in the flip-flop. The flip-flop may include a pulse generator that receives an input clock signal with a high level equal to a first level and generates a pulse signal with a high level that may be converted into a second level higher than the first level. The flip-flop may further include a latch that latches input data with a high level equal to a third level lower than the second level and outputs output data with a high level that may be converted into the second level in response to the pulse signal. The third level may be equal to the first level. A supply voltage of the second level may be used as a supply voltage to the latch. Both the pulse generator and the flip-flop may have a level converting function without additional circuits, and therefore, the operating speeds of the pulse generator and the flip-flop may be increased without increasing the area and power consumption of the system.