Level Shift Circuit Layout for Balanced Edges and Low Through Current
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Solution Overview
Problem
Existing level shift circuits in semiconductor devices experience a difference in rising and falling times, leading to through currents due to differences in operating speed, which is not effectively addressed by existing methods.
Innovation Solution
A semiconductor device with a level shift circuit unit comprising two level shift circuits, an input circuit supplying complementary signals, and an output circuit that converts these signals into in-phase signals and short-circuits them, ensuring balanced rising and falling times to prevent through currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a level shift circuit is used to convert signal amplitude, then the signal level is converted from internal to external voltage, but the duty ratio of the signal changes due to difference in rising and falling times
Solution Approach 1:
The level shift function is divided into two separate circuits: one dedicated to rising edge conversion and another for falling edge conversion. Each circuit is optimized for its specific edge type, allowing independent optimization of rising and falling times without mutual interference, thus maintaining duty ratio while achieving level conversion.
Solution Approach 2:
The outputs of the rising edge level shift circuit and falling edge level shift circuit are merged together to form the final level-converted signal. This combination allows both circuits to operate simultaneously, with their complementary functions working together to maintain signal integrity and duty ratio while achieving level conversion.
2Manufacturing precision
If a pair of level shift circuits with opposite conductivity types are connected in parallel, then the rising and falling time difference is reduced, but through current occurs due to difference in operating speed between the circuits
Solution Approach 1:
The circuit design incorporates preliminary control mechanisms that prepare the level shift circuits for operation in a controlled sequence. By pre-configuring the operating states and using control signals to coordinate the activation of each circuit, the system minimizes speed differences between circuits and prevents through current while maintaining balanced rising and falling times.
Solution Approach 2:
Control circuits act as intermediaries between the power supply and the level shift circuits, regulating the operating conditions and timing of each circuit. These intermediary control mechanisms ensure synchronized operation, reduce speed mismatches, and prevent direct conflicts that would cause through current while maintaining balanced signal transitions.
Data Source
AI summary
A semiconductor device includes: two level shift circuits having substantially the same circuit configuration; an input circuit that supplies complementary input signals to the level shift circuits, respectively; and an output circuit that converts complementary output signals output from the level shift circuits into in-phase signals and then short-circuits the in-phase signals. According to the present invention, the two level shift circuits having substantially the same circuit configuration are used, and the complementary output signals output from the level shift circuits are converted into in-phase signals before short-circuited. This avoids almost any occurrence of a through current due to a difference in operating speed between the level shift circuits.


