Level Shift Circuit High-Speed Data Driver
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Solution Overview
Problem
Existing level shift circuits face challenges in quickly and efficiently converting low-amplitude digital signals to high-amplitude voltage signals while maintaining stability and reducing area usage, particularly in high-speed data drivers for display devices.
Innovation Solution
A level shift circuit configuration featuring a first transistor of a first conductivity type connected between a first power supply line and a node, with second and third transistors of a second conductivity type in series between a second power supply line and the node, along with a clocked inverter and an inverter, allows for high-speed level shifting and stable signal holding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional level shift circuits are used to convert low-amplitude digital signals to high-amplitude voltage signals, then signal level conversion is achieved, but the conversion speed is insufficient for high-speed data drivers
Solution Approach 1:
The patent employs dynamic switching mechanisms using multiple transistors (first transistor of first conductivity type, second and third transistors of second conductivity type) that are controlled to switch between different conduction states based on input signal levels. This dynamic operation enables rapid signal level transitions, achieving high-speed level shifting suitable for high-performance data drivers
2Area of stationary object
If conventional level shift circuits are used, then signal conversion is achieved, but area usage is excessive
Solution Approach 1:
The patent integrates multiple functions into a compact circuit configuration where the first transistor, second transistor, and third transistor work together in a unified structure. The second and third transistors are connected in series between power supply lines, sharing common nodes and control mechanisms, which reduces overall circuit area while maintaining signal stability through coordinated operation of all components
3Stability of the object's composition
If conventional level shift circuits are used, then basic signal conversion is achieved, but signal stability during holding is insufficient
Solution Approach 1:
The patent implements a feedback mechanism where the output of the clocked inverter is fed back to control the switching of the second and third transistors. This feedback loop ensures that once the signal level is shifted, the circuit maintains stable holding of the signal state, preventing drift while preserving the ability to rapidly respond to new input changes through the clocked inverter's controlled operation
Data Source
AI summary
Disclosed is a level shift circuit that includes a first transistor of a first conductivity type connected between a first power supply line and a first node, and second and third transistors of a second conductivity type connected in series between a second power supply line and the first node. A first control signal is supplied in common to a gate of the first transistor and a gate of one of the second and third transistors. A gate of the other of the second and third transistors is connected to an input terminal to which an input signal with an amplitude lower than a power supply amplitude of the first and second power supplies is supplied. The level shift circuit includes a clocked inverter connected between the first node and a first output terminal and controlled to be turned on or off by a second control signal, an inverter with an input thereof connected to the first output terminal, and a switch connected between the first node and an output of the inverter and controlled to be turned on or off by a third control signal. The clocked inverter and the inverter are both arranged between the first and second power supply lines.