Level Shift Circuit for Image Display Devices
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Solution Overview
Problem
Existing level shift circuits in image display devices face challenges with low yield and high operating frequency requirements due to the need for large transistor sizes and the substrate bias effect, especially in low voltage and TFT circuits, which complicates the integration of high-speed and low-voltage operations without external clock or control signals.
Innovation Solution
The proposed solution involves a level shift circuit configuration using PMOS and NMOS transistors with specific connections and operations that allow for high-speed and low-voltage operation without external clock or control signals, incorporating PMOS transistors with source electrodes connected to power voltage and gate electrodes cross-coupled with drain electrodes, and NMOS transistors with source electrodes connected to ground, enabling efficient level shifting within the image display device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional level shift circuit is used with external clock and control signals, then the circuit can operate reliably, but the device complexity and external signal requirements increase
Solution Approach 1:
The level shift circuit uses its own output signals to control its internal transistors, eliminating the need for external clock and control signals. The circuit generates its own control signals internally through the cross-coupled transistor configuration, making it self-sufficient and reducing external dependencies.
Solution Approach 2:
The invention extracts and removes the external clock and control signal requirements from the system by incorporating self-generating control mechanisms within the level shift circuit itself, thereby simplifying the overall system architecture.
2Speed
If large transistor sizes are used in level shift circuits, then high-speed operation is achieved, but the manufacturing yield decreases
Solution Approach 1:
The invention changes the circuit configuration parameters by using cross-coupled transistor connections and specific source/drain configurations that enable high-speed operation with smaller, more manufacturable transistor sizes, improving yield while maintaining performance.
Solution Approach 2:
The level shift circuit combines PMOS and NMOS transistors in a cross-coupled configuration, creating a composite circuit structure that achieves high-speed operation without requiring excessively large individual transistor sizes, thereby improving manufacturing yield.
3Adaptability or versatility
If TFT transistors are used in level shift circuits, then integration with display panels is improved, but the substrate bias effect increases
Solution Approach 1:
The invention introduces specific circuit configurations with cross-coupled transistors that act as intermediaries to control and minimize the substrate bias effect, allowing TFT-based implementation while reducing the harmful electrical effects on transistor operation.
Solution Approach 2:
The circuit design applies different connection configurations to different transistors (PMOS vs NMOS) to locally optimize their operation and minimize the substrate bias effect in each region of the circuit, thereby reducing overall harmful effects while maintaining TFT integration benefits.
Data Source
AI summary
The present invention provide an image display device including a level shift circuit not requiring a clock signal nor a control signal from the outside and operating at a low voltage and ensuring a high yield.The level shift circuit comprises a pair of transistors each having a source electrode connected to a power, a gate electrode and a drain electrode (the gate electrode and the drain electrode of one of the transistors being connected with the drain electrode and the gate electrode of the other (cross coupling)); and transistors each having an a source electrode connected to a low voltage source or the ground, a drain electrode connected to a connection point for the cross coupling, and a gate electrode, one of the gate electrodes being connected to an input signal and the other being connected to an input inversion signal. The level shift circuit has also a transistor having a gate electrode connected to a connection point for the cross-coupling, a drain electrode connected to a connection point for cross-coupling forming a pair with the cross-coupling connection point, and a source electrode, one of the source electrodes being connected to an input signal and the other being connected to an input inversion signal. The transistor with at least the gate electrode connected to the cross-coupling connection point is a TFT formed on an insulating substrate.