Level-Shift Circuit With Oxide Semiconductor Transistors

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Solution Overview

Problem

High-resolution display devices require driver ICs with level-shift circuits that operate efficiently, but existing solutions lead to increased chip area due to larger transistor sizes, necessitating a novel structure that stabilizes operation without expanding chip area.

Innovation Solution

A level-shift circuit design incorporating p-channel and n-channel transistors, including oxide semiconductor transistors with back gates, to boost signal voltage while minimizing transistor size and chip area, utilizing specific transistor connections and configurations to control current flow effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the transistor channel width is increased to ensure stable operation of the level-shift circuit, then the operational stability is improved, but the chip area increases

Engineering Contradiction:
Improveoperational stabilityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies local quality by using oxide semiconductor material specifically in the channel formation region of the n-channel transistors (fourth and eighth transistors). This localized application of high-quality material provides superior electrical characteristics and stable operation only where needed, rather than increasing the size of all transistors in the circuit.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the material parameter of the transistor channel from conventional semiconductor to oxide semiconductor. This parameter change enables the transistors to achieve stable operation with smaller dimensions, as oxide semiconductors provide better electrical characteristics including lower off-state current and more stable threshold voltage.

Inventive Principle:
Principle #35Parameter changes

2Area of stationary object

If the transistor size is reduced to decrease chip area, then the chip area is reduced, but the operational stability deteriorates

Engineering Contradiction:
Improvechip areaVSAvoidoperational stability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies local quality by using oxide semiconductor material specifically in the channel formation region of the n-channel transistors (fourth and eighth transistors). This localized application of high-quality material provides superior electrical characteristics and stable operation only where needed, rather than increasing the size of all transistors in the circuit.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses composite material structure by combining oxide semiconductor layer with metal layers (such as aluminum or copper) to form the transistor channel. This composite structure leverages the advantages of both materials: oxide semiconductor provides stable electrical characteristics while metals provide good conductivity, enabling small-size transistors to operate stably.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS10033361B2Level-shift circuit, driver IC, and electronic device
Publication Date: 2018.07.24 SEMICON ENERGY LAB CO LTD
  • US10033361B2 patent drawing
  • US10033361B2 patent drawing
  • US10033361B2 patent drawing

AI summary

A level-shift circuit that operates stably is provided. The level-shift circuit has a function of boosting a first signal having an amplitude voltage between a first voltage and a second voltage to a second signal having an amplitude voltage between a third voltage and the second voltage. The level-shift circuit includes first to eighth transistors. Gates of the third and seventh transistors are electrically connected to a wiring for transmitting a third signal for controlling the amounts of current flowing into one of a source and a drain of the first transistor, one of a source and a drain of the second transistor, one of a source and a drain of the fifth transistor, and one of a source and a drain of the sixth transistor.