Level-Shift Current Mirror Circuit for High-Voltage PSRR
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Solution Overview
Problem
Existing semiconductor devices on the high-voltage side require separate circuits for IGBTs, gate drivers, and current detection, leading to increased mounting area and complexity due to mixed potential grounds and high power-supply rejection ratio requirements.
Innovation Solution
A semiconductor device is developed that integrates required circuit functions onto a single chip, utilizing a level shift circuit and an error absorption circuit to achieve a high power-supply rejection ratio from low to high voltage, thereby reducing the mounting area and simplifying the circuit configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If separate circuits are used for IGBT, gate driver, and current detection on the high-voltage side, then each circuit can be independently designed and manufactured, but the mounting area increases and circuit complexity increases due to mixed potential grounds
Solution Approach 1:
The patent combines the gate driver circuit and current detection circuit into a single integrated circuit chip. The gate driver includes a level shift circuit that directly integrates the current detection function, eliminating the need for separate discrete circuits. This merging reduces the mounting area while maintaining independent design capabilities through modular circuit blocks within the integrated chip.
2Ease of manufacture
If separate circuits are used for IGBT, gate driver, and current detection on the high-voltage side, then each circuit can be independently designed and manufactured, but the circuit complexity increases due to mixed potential grounds requiring high withstand-voltage circuits
Solution Approach 1:
By integrating the current detection circuit within the gate driver chip, the patent eliminates the need for separate high withstand-voltage isolation circuits between discrete components. The mixed potential ground issue is resolved through integrated ground reference design, reducing circuit complexity while maintaining manufacturability.
3Productivity
If the IGBT is switched on, then the motor can be driven, but a high power-supply rejection ratio is required which may require additional circuits
Solution Approach 1:
The patent integrates the power-supply rejection function directly into the level shift circuit of the gate driver. The level shift circuit is designed to inherently reject power supply variations, eliminating the need for separate additional circuits. This maintains motor driving capability while reducing overall device complexity.
4Adaptability or versatility
If conventional separate circuits are used, then design flexibility is maintained, but the mounting area increases and high withstand-voltage circuits are required
Solution Approach 1:
The patent achieves design flexibility through modular circuit blocks within the integrated chip, including configurable level shift stages and current detection circuits. This integration maintains adaptability for different applications while significantly reducing mounting area compared to discrete separate circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The integrated semiconductor device achieves a high power-supply rejection ratio, reducing the mounting area and simplifying the circuit configuration, while maintaining effective level shift behavior across voltage levels.
Implementation Method 1
a clamp transistor between whose drain and source the first mirror current flows and to whose base a power supply voltage of the constant current generating circuit unit is applied
Implementation Method 2
an error absorption circuit unit having a capacitance corresponding to a parasitic capacitance of the clamp transistor connected to a terminal for outputting the second mirror current
Data Source
AI summary
A semiconductor device includes: a constant current generating circuit unit; a first current mirror circuit unit having a constant current as an input current and generating a first mirror current as a mirror current; a level shift circuit unit including a clamp transistor between whose drain and source a first mirror current flows and to whose base a power supply voltage of the constant current generating circuit unit is applied, and a transistor that is connected in series to the clamp transistor and through which the first mirror current flows; a second current mirror circuit unit having as an input stage a transistor and having as an output stage a transistor through which a second mirror current replicating the first mirror current flows; and an error absorption circuit unit connected to a terminal for outputting the second mirror current of the output-stage transistor in the second current mirror circuit unit.