Differential Amplifier Offset Correction With Level-Shifted Input Switch
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Solution Overview
Problem
Conventional semiconductor integrated circuits with differential amplifiers cannot correct offset voltage when the input voltage is negative due to the formation of a parasitic PN diode between the N-channel DMOS and P-channel substrate, preventing the DMOS analog switch from operating.
Innovation Solution
A semiconductor integrated circuit design that includes a switch to electrically connect or disconnect input terminals, a differential amplifier to generate a differential output voltage, and a sample hold unit connected to a power supply to generate an offset correction voltage based on the differential output voltage and a reference voltage, allowing for offset correction regardless of the input voltage level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a DMOS analog switch is directly connected to the input terminal of the differential amplifier, then the offset correction can be performed for positive input voltages, but the switch cannot operate when the input voltage is negative due to parasitic PN diode formation
Solution Approach 1:
The patent introduces a level shift circuit as an intermediary component between the input terminal and the DMOS analog switch. This level shift circuit shifts the voltage level of the input signal, ensuring that the gate-source voltage of the DMOS switch remains within the operational range even when the input voltage is negative. By adding this intermediary voltage level adjustment stage, the switch can now operate correctly across the full input voltage range including negative voltages, thereby resolving the contradiction between maintaining offset correction reliability and expanding adaptability to negative input voltages.
2Measurement precision
If the signal path is short-circuited to set the differential input voltage to zero for offset correction, then the offset correction is performed, but the circuit cannot handle negative input voltages due to parasitic diode conduction
Solution Approach 1:
The level shift circuit serves as a mediator that prevents direct short-circuiting of the signal path while still achieving the effect of zeroing the differential input voltage for offset correction. During offset correction mode, the level shift circuit adjusts the voltage levels such that the differential input voltage becomes zero, enabling precise offset correction. Simultaneously, the level shift circuit ensures that the DMOS switch operates within its valid voltage range, preventing parasitic diode conduction even when external input voltages are negative, thus maintaining reliability under negative voltage conditions.
Solution Approach 2:
The patent employs parameter changes by dynamically adjusting the voltage level parameters through the level shift circuit. The level shift circuit modifies the gate-source voltage parameter of the DMOS switch based on the input voltage conditions, ensuring it remains within the operational range. This parameter adjustment mechanism allows the circuit to maintain both precise offset correction capability and reliable operation under negative input voltages, resolving the contradiction between measurement precision and reliability.
Data Source
AI summary
A semiconductor integrated circuit includes a first input terminal configured to input a first input voltage, a second input terminal configured to input a second input voltage, a differential amplifier configured to generate a differential output voltage by amplifying a differential input voltage obtained from a difference between the first input voltage input by the first input terminal and the second input voltage input by the second input terminal, a switch configured to electrically connect or cut off the first input terminal and the second input terminal, and a sample hold unit connected to a power supply which generates a reference voltage and configured to generate an offset correction voltage of the differential amplifier based on the differential output voltage and the reference voltage when the first input terminal and the second input terminal are electrically connected by the switch.