Level-Shifted Switching Circuit for Lower On-Resistance

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing switching circuits face high on-resistance issues due to high gate voltage requirements, leading to increased power loss and higher costs for voltage-rated MOS transistors.

Innovation Solution

A switching circuit design using a compound junction transistor and an enhancement-mode MOS transistor in series, with a level-shifting circuit to generate controlled gate voltages, ensuring the first transistor operates at reduced on-resistance without entering a forward bias state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a fixed voltage VOS (15V to 25V) is applied between the source of transistor M2 and the gate of transistor M1, then the on-resistance of transistor M1 is reduced, but the drain voltage VD2 of transistor M2 rises, requiring higher voltage-rated MOS transistors which increases cost and on-resistance

Engineering Contradiction:
Improvepower lossVSAvoidvoltage rating requirement
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The patent applies dynamics by making the gate voltage of transistor M1 variable rather than fixed. The control circuit dynamically adjusts the gate voltage based on the operating state of the switching circuit, allowing the system to optimize performance across different operating conditions rather than being constrained by a fixed voltage requirement

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of gate voltage from a fixed value (15V-25V) to a dynamically adjustable parameter. By implementing a control circuit that can vary the gate voltage according to operational needs, the system achieves lower on-resistance without requiring high-voltage-rated transistors, thus resolving the contradiction between power loss reduction and voltage rating requirements

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If the gate voltage of transistor M1 is fixed at 15V to 25V, then the on-resistance of transistor M1 is reduced, but the drain voltage VD2 of transistor M2 increases, leading to higher costs and increased on-resistance

Engineering Contradiction:
Improvepower lossVSAvoidvoltage rating requirement
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent introduces a control circuit as an intermediary between the power supply and transistor M1. This control circuit mediates the voltage delivery by providing precisely controlled gate voltage to M1 without requiring the full voltage to be present across transistor M2, thereby reducing both power loss and the voltage rating requirements for M2

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If transistor M1 is configured with gate voltage directly from source of transistor M2, then the circuit complexity is low, but the on-resistance of transistor M1 is high, resulting in higher equivalent on-resistance and greater power loss

Engineering Contradiction:
Improvecircuit configurationVSAvoidpower loss
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The control circuit serves as an intermediary that generates the appropriate gate voltage for transistor M1 based on the operating state. This intermediary component adds minimal complexity while dramatically reducing power loss by ensuring transistor M1 operates with optimal gate voltage rather than relying on the simple direct connection from M2's source

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20260066897A1Switching circuit capable of effectively reducing on-resistance
Publication Date: 2026.03.05 RICHTEK TECH
  • US20260066897A1 patent drawing
  • US20260066897A1 patent drawing
  • US20260066897A1 patent drawing

AI summary

A switching circuit includes a first transistor, which is a compound junction transistor; and a second transistor, which is an enhancement-type MOS transistor. The first transistor and the second transistor are connected in series between the first and second terminals of the switching circuit and are configured to control conduction and cutoff between these two ends. A first gate voltage is configured to control the gate of the first transistor; a second gate voltage is configured to control the gate of the second transistor. A level-shifting circuit is configured to generate the first gate voltage based on a voltage correlated with the second gate voltage.