Differential Level Shifter With AC/DC Feed-Forward Paths
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Solution Overview
Problem
The challenge lies in integrating a broadband data transmission system within an integrated circuit (IC) that can handle different common mode voltage requirements between a transmitter and a receiver, while also providing high-speed data throughput, which is typically hindered by PCB layout constraints and the need for both AC and DC signal paths.
Innovation Solution
A semiconductor die with a differential input conditioning stage and a data communication processing circuit, featuring a level shifter and feed-forward paths with capacitors, provides a predefined input impedance and common mode voltage, enabling internal common mode voltage generation independent of the input common mode voltage, and supports both AC and DC signal paths for enhanced bandwidth and noise immunity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a broadband transmitter is separated from a broadband receiver, then the receiver can condition the input signal and present an adaptable interface, but the system complexity increases due to separate components and layout constraints
Solution Approach 1:
The patent combines the transmitter and receiver into a single integrated circuit device, merging previously separate components. The receiver is integrated within the same IC as the transmitter, eliminating external PCB layout constraints and reducing system complexity while maintaining signal conditioning and interface adaptability functions.
Solution Approach 2:
The integrated receiver is designed to handle multiple data rates (e.g., 1.92 Gbps, 3.84 Gbps, 7.68 Gbps, 15.36 Gbps, 30.72 Gbps, 61.44 Gbps, 122.88 Gbps) and adapt to different common mode voltage requirements. The feed-forward paths with capacitors provide universal functionality across AC and DC coupling scenarios, making the receiver universally applicable to various transmitter configurations.
2Object-affected harmful factors
If AC coupling capacitors are used for broadband data transmission, then noise immunity is improved, but the bandwidth is limited and high-speed data throughput above 10 Gbps becomes difficult to achieve
Solution Approach 1:
The signal path is segmented into multiple parallel feed-forward paths: AC-coupled paths with capacitors for noise immunity, and DC-coupled paths without capacitors for high-speed throughput. This segmentation allows each path to optimize for its specific function, with the DC paths enabling data rates above 10 Gbps while AC paths provide noise filtering.
Solution Approach 2:
The capacitors in the AC feed-forward paths act as intermediaries that selectively filter noise from the signal. These capacitors are positioned in parallel with DC feed-forward paths, allowing the AC paths to handle noise-sensitive signals while DC paths handle high-speed data transmission without capacitive limitations.
3Adaptability or versatility
If different common mode voltage requirements exist between transmitter and receiver, then interface flexibility is improved, but additional circuitry is needed to manage voltage levels
Solution Approach 1:
The receiver is designed with equipotential nodes that can operate at different common mode voltage levels. The feed-forward paths are configured to maintain proper voltage relationships between differential signal pairs, allowing the receiver to interface with transmitters having different common mode voltages without additional level-shifting circuitry.
Solution Approach 2:
The receiver circuitry is designed to accommodate changes in common mode voltage parameters. By allowing the common mode voltage to float or be determined by external components rather than being fixed by internal circuitry, the receiver can adapt to different voltage requirements of various transmitters without adding complexity.
4Ease of manufacture
If PCB layout constraints are present, then manufacturing is simplified, but achieving high-speed data transmission and proper signal conditioning becomes difficult
Solution Approach 1:
By integrating the receiver and transmitter in a single IC, the patent eliminates the need for complex PCB layout considerations for high-speed signal routing. All signal conditioning, amplification, and processing occurs within the integrated device, simplifying PCB design while enabling high-speed data transmission through carefully controlled internal signal paths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables high-speed data throughput of at least 1 Gbps, with flexibility to accommodate various data rates up to 100 Gbps, by effectively managing common mode voltage and providing noise immunity across long-distance wireline communication paths.
Implementation Method 1
a positive alternating current (AC) coupled feed-forward path comprising a first capacitor coupled to the positive differential input and coupled to the positive differential output, a negative AC coupled feed-forward path comprising a second capacitor coupled to the negative differential input and coupled to the negative differential output
Data Source
AI summary
A semiconductor die. The die comprises a level shifter coupled to a positive differential input and to a negative differential input comprising a first operational amplifier, wherein the first operational amplifier is configured to generate an internal common mode voltage coupled to a positive differential output and to a negative differential output, a positive alternating current (AC) coupled feed-forward path comprising a first capacitor coupled to the positive differential input and to the positive differential output, a negative AC coupled feed-forward path comprising a second capacitor coupled to the negative differential input and to the negative differential output, a positive direct current (DC) feed-forward path coupled to the differential input, to the internal common mode voltage sense node, and to the positive differential output, and a negative DC feed-forward path coupled to the differential input, to the internal common mode voltage sense node, and to the negative differential output.