Level Shifter Circuit for Bipolar Clock Switching in Chopper Amplifiers

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Solution Overview

Problem

Current level shifter circuits are inadequate in generating bipolar clock signals necessary to effectively turn on and off transistors in chopper amplifier circuits, leading to signal leakage and distortion, especially at high temperatures, due to their unipolar voltage swing limitations.

Innovation Solution

A level shifter circuit configuration that generates bipolar clock signals by using multiple transistor pairs and a clock generation circuit, allowing the clock signals to oscillate between two voltage levels, ensuring proper turn-on and turn-off of transistors, thereby reducing signal leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional level shifter circuit is used, then the circuit structure is simple, but it cannot generate bipolar clock signals leading to signal leakage and distortion

Engineering Contradiction:
Improvesignal integrityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The level shifter circuit is divided into multiple independent transistor pairs (first transistor pair, second transistor pair, third transistor pair, fourth transistor pair), each responsible for generating specific clock signals. This segmentation allows each pair to be optimized for bipolar signal generation while maintaining overall circuit functionality and reducing signal leakage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit employs a nested structure where transistor pairs are coupled together in a hierarchical manner. The first and second transistor pairs are coupled at first and second nodes, while the third and fourth transistor pairs are coupled at third and fourth nodes, creating a nested configuration that enables bipolar clock signal generation across multiple voltage levels.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If a level shifter generates unipolar clock signals, then the circuit operation is simple, but transistor turn-off is incomplete causing signal leakage

Engineering Contradiction:
Improvetransistor switching accuracyVSAvoidclock signal generation mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The circuit changes the voltage parameters of clock signals from unipolar to bipolar configuration. The clock signals are designed to swing between multiple voltage levels (first voltage level, second voltage level, third voltage level, fourth voltage level), enabling complete transistor turn-off by providing sufficient negative swing below the threshold voltage.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The level shifter generates dynamic bipolar clock signals that actively swing between different voltage levels rather than maintaining a static or unipolar configuration. This dynamic voltage swing ensures proper transistor switching by providing both positive and negative excursions relative to the threshold voltage.

Inventive Principle:
Principle #15Dynamics

3Reliability

If multiple transistor pairs are used to generate bipolar clock signals, then signal leakage is reduced, but the circuit complexity increases

Engineering Contradiction:
Improvesignal leakage reductionVSAvoidnumber of transistor pairs
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple transistor pairs are merged and coupled together to form an integrated level shifter circuit. The first transistor pair is coupled to the second transistor pair, and the third transistor pair is coupled to the fourth transistor pair, creating a unified structure that generates bipolar clock signals while sharing common nodes and reducing overall complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10326451B2Level shifter circuit generating bipolar clock signals
Publication Date: 2019.06.18 TEXAS INSTRUMENTS INC
  • US10326451B2 patent drawing
  • US10326451B2 patent drawing
  • US10326451B2 patent drawing

AI summary

In some examples, a level shifter circuit comprises: a first transistor pair cascoded at a first input node; a second transistor pair cascoded at a second input node, wherein the first and transistor pairs couple at a first node, a second node, a third node, and a fourth node; a third transistor pair coupled to the first transistor pair at the first and the third nodes, wherein the third transistor pair is configured to generate a first bipolar clock signal; a fourth transistor pair coupled to the second transistor pair at the second and the fourth nodes, wherein the fourth transistor pair is configured to generate a second bipolar clock signal; and a clock generation circuit coupled to the first node, the second node, the third node, and the fourth node.