High-Voltage Level Shifter Blocking Circuit for Fast Switching

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Solution Overview

Problem

Conventional high voltage transistor drivers experience significant propagation delays, especially in the 600V range, and include de-glitch filters that increase delay further, while lacking immunity to common mode and other disturbing signals.

Innovation Solution

The implementation of blocking circuitry in high voltage level shifters that monitors signal voltages on the ON and OFF pulse lines to inhibit driver transitions caused by disturbing signals, eliminating the need for de-glitch filters and reducing propagation delay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If de-glitch filters are used in conventional high voltage transistor drivers, then immunity to disturbing signals is improved, but propagation delay increases significantly

Engineering Contradiction:

Improveimmunity to disturbing signalsVSAvoidpropagation delay

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent removes the de-glitch filter component from the driver circuit entirely. Instead of filtering disturbing signals, the design uses a blocking circuit that detects voltage differences between complementary pulse lines to identify and block only those transitions caused by common mode transients, while allowing legitimate signal transitions to pass through without delay.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The blocking circuit performs preliminary detection of voltage conditions on the ON and OFF pulse lines before allowing driver transitions. By monitoring voltage differences in advance and only blocking transitions when a predetermined voltage difference threshold is not met, the circuit prevents harmful transitions while maintaining fast response for legitimate signals.

Inventive Principle:

Principle #10Preliminary action

2Device complexity

If conventional high voltage transistor drivers are used, then device simplicity is maintained, but propagation delay becomes unacceptably long

Engineering Contradiction:

Improvedriver circuit structureVSAvoidpropagation delay

Core Design Contradiction:

Device complexityVSLoss of time

Solution Approach 1:

The patent introduces a blocking circuit as an intermediary component between the pulse generator and the output driver. This blocking circuit acts as a smart gate that selectively permits or blocks driver transitions based on real-time voltage conditions on the pulse lines, achieving fast propagation delay while maintaining immunity to common mode transients.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Reliability

If blocking circuitry is added to monitor pulse line voltages, then immunity to common mode transients is improved, but device complexity increases

Engineering Contradiction:

Improveimmunity to common mode transientsVSAvoiddriver circuit structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The blocking circuit functionality is merged with the existing driver circuit architecture. The voltage detection and blocking logic are integrated into the driver's control path, sharing components and signal lines with the pulse generator and output stage, thereby achieving improved transient immunity without proportionally increasing overall device complexity.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS10230372B2High voltage level shifter with short propagation delay

Publication Date: 2019.03.12 TEXAS INSTRUMENTS INC

AI summary

A lever shifter includes an output driver and a high-side gate driver. The high-side gate driver is configured to drive the high-side output transistor, and is coupled to an on pulse signal line that conducts an on pulse, and is coupled to an off pulse signal line that conducts an off pulse. The high-side gate driver includes a blocking circuit configured to enable generation of a drive signal to the high-side output transistor based on a voltage of a first of the on or off pulse signal line being greater than a first predetermined amount and a voltage of a second of the on or off signal line being less than a second predetermined amount.