Level Shifter Clock Generation for GOA Circuit Simplification
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Solution Overview
Problem
The complexity and cost of gate driver on array (GOA) driving devices for liquid crystal display panels increase with the number of clock signals required, leading to a more intricate circuit structure and larger volume, which complicates product design and manufacturing.
Innovation Solution
A driving method and device that simplifies the connection structure by configuring a level shifter's register parameter, allowing the timing controller to output only a start signal, reducing the number of output pins and circuit complexity, and utilizing a level shifter to generate drive signals for the display panel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the common GOA driving device uses multiple clock signals (x CKs, two LC signals) and corresponding T-CON output pins, then the driving function is achieved, but the circuit structure becomes more complex and the volume increases
Solution Approach 1:
The patent extracts the clock signal generation function from the T-CON and places it in the level shifter through register configuration. The T-CON only outputs the start signal STV, while the level shifter generates all necessary clock signals (CK0-CK7 and LC0-LC1) based on the configured register parameters, thereby simplifying the T-CON circuit structure.
Solution Approach 2:
The level shifter acts as an intermediary component that receives only the start signal from the T-CON and internally generates all required clock signals through its register-configurable logic. This intermediary function resolves the contradiction by allowing the T-CON to remain simple while still achieving complete driving functionality.
2Volume of moving object
If the T-CON outputs multiple clock signals to drive the GOA circuit, then the driving capability is sufficient, but the number of output pins increases and the product volume increases
Solution Approach 1:
The level shifter is designed with multi-functionality: it serves as both a voltage level converter and a clock signal generator. By configuring the register with appropriate parameters, the level shifter can generate all necessary clock signals (CK0-CK7 and LC0-LC1) internally, eliminating the need for multiple T-CON output pins while maintaining complete driving capability.
Solution Approach 2:
The patent utilizes parameter changes in the level shifter's register to control signal generation. By setting specific register parameters (such as division ratios and polarity settings), the level shifter dynamically generates the required clock signals, reducing the physical footprint while maintaining signal completeness.
3Device complexity
If more clock signals are used in the GOA timing, then the display panel can be driven, but the T-CON circuit structure becomes more complex and requires larger volume
Solution Approach 1:
The patent segments the driving functions between two components: the T-CON handles only the start signal generation, while the level shifter handles clock signal generation through register configuration. This segmentation allows the T-CON circuit structure to be simplified while the level shifter performs the complex timing and signal generation tasks.
Solution Approach 2:
The level shifter performs self-service by generating its own clock signals internally based on register parameters without requiring external input from the T-CON. This self-service capability eliminates the need for complex T-CON circuitry while maintaining full display panel driving capability.
Data Source
AI summary
A driving method and a driving device of a display panel are provided. The driving method includes: controlling a timing controller to output a start signal to a level shifter; configuring a parameter of a register of the level shifter; and controlling the level shifter to generate a drive signal according to the parameter upon receiving the start signal, and outputting the drive signal to a first drive circuit.