Voltage Level Shifter Circuit With Current Mirror Switching Boost
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Solution Overview
Problem
Conventional voltage level shifter circuits suffer from low bandwidth due to high parasitic capacitance, resulting in reduced switching speed and increased current consumption, which affects the efficiency of voltage level shifting.
Innovation Solution
A voltage level shifting circuit with a field-effect transistor (FET) switch and a current mirror circuit, where a charge storage circuit, including capacitors and diodes, is used to manage current flow and reduce switching time by increasing current only during switching, thereby minimizing current consumption after switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional voltage level shifter circuits are used, then voltage level shifting function is achieved, but bandwidth is reduced due to high parasitic capacitance
Solution Approach 1:
The patent extracts and removes the problematic parasitic capacitance elements from the signal path by using a specialized switch configuration that eliminates Miller capacitance effects, thereby improving bandwidth while maintaining the voltage level shifting function
Solution Approach 2:
The patent introduces a current mirror circuit as an intermediary mechanism that controls the switching action, allowing the switch to operate in a manner that minimizes parasitic capacitance effects on the signal path while still achieving the desired voltage level transition
2Speed
If conventional voltage level shifter circuits are used, then voltage level shifting function is achieved, but switching speed is reduced
Solution Approach 1:
The patent employs dynamic switching control where the switch operates in a controlled manner with current mirroring to optimize switching speed, adapting the current flow dynamically during the switching transition to minimize the effect of parasitic capacitance
Solution Approach 2:
The patent changes the operating parameters of the switch by controlling it through a current mirror rather than direct voltage control, which alters the switching characteristics to reduce parasitic capacitance effects and improve switching speed
3Use of energy by moving object
If conventional voltage level shifter circuits are used, then voltage level shifting function is achieved, but current consumption is increased
Solution Approach 1:
The patent uses periodic switching control where the switch is activated only during the necessary transition periods, with the current mirror circuit managing current flow to minimize consumption during steady states while maintaining high efficiency during active switching events
Solution Approach 2:
The current mirror circuit automatically regulates the current flow through the switch, providing self-controlled current management that minimizes consumption without external intervention, improving overall switching efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances switching speed and reduces current consumption by controlling current flow effectively, maintaining high current during switching and minimizing it afterward, thus improving the efficiency of voltage level shifting.
Implementation Method 1
a charge storage circuit, including capacitors and diodes, is used to manage current flow and reduce switching time by increasing current only during switching
Data Source
AI summary
A voltage level shifting circuit with an input terminal and an output terminal. The level shifting circuit has a field-effect transistor (FET) switch with a gate attached to the input terminal, a drain attached to the output terminal and a source attached to a current changing mechanism. The current changing mechanism includes a current mirror circuit having an output connected between the source and an electrical earth. The output of the current mirror circuit is preferably adapted to change a current flowing between the drain and the source based on an input voltage applied to the gate.