High-Speed Level Shifter With Current-Pulse Precharge
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Solution Overview
Problem
Conventional level-shifters in high voltage systems experience delays and noise-induced glitches due to parasitic capacitance charging, which can lead to erroneous switching states in high-side semiconductor switches, particularly in buck converters.
Innovation Solution
A level-shifter design that includes a current source to inject a current pulse into the parasitic capacitance based on the variation of the switching signal, using a current mirror to accelerate charging and reduce delay, thereby minimizing spurious glitches and improving noise robustness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If conventional level-shifters are used without current source acceleration, then the circuit structure remains simple, but the delay time increases due to parasitic capacitance charging
Solution Approach 1:
The current source pre-charges the parasitic capacitance before the actual switching event occurs. By detecting the switching signal in advance and injecting current into the parasitic capacitance, the level-shifter reduces the charging time required during the actual switching operation, thereby reducing overall delay time without fundamentally changing the circuit architecture
Solution Approach 2:
A current source is introduced as an intermediary component between the power supply and the parasitic capacitance. This current source acts as a mediator that accelerates the charging process by providing additional current during critical switching transitions, effectively reducing delay without requiring redesign of the core level-shifting circuitry
2Reliability
If the parasitic capacitance is allowed to charge naturally, then the circuit operation is stable, but noise-induced glitches can cause erroneous switching states
Solution Approach 1:
The parasitic capacitance is pre-charged to the appropriate voltage level before the switching event occurs. This preliminary charging ensures that when the switching signal arrives, the capacitance is already in the correct state, preventing noise-induced glitches from causing erroneous switching while maintaining fast response times
Solution Approach 2:
The circuit monitors the voltage level across the parasitic capacitance and uses this feedback information to control the current source. When the capacitance voltage approaches the target level, the current source automatically reduces or stops current injection, ensuring precise voltage control and preventing overcharging that could lead to switching errors
3Loss of time
If a current source is added to accelerate parasitic capacitance charging, then the delay time is reduced, but the power consumption increases
Solution Approach 1:
The current source operates periodically rather than continuously, activating only during critical switching transitions when acceleration is needed. By injecting current pulses synchronized with switching events and remaining inactive during steady-state operation, the circuit achieves fast switching when required while minimizing overall power consumption
Solution Approach 2:
The current source provides excessive current during the brief switching transition period to rapidly charge the parasitic capacitance, but this excessive current is applied only partially in time rather than continuously. This approach achieves the necessary speed improvement during critical moments while accepting temporary high power consumption that averages out to acceptable overall power usage
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed level-shifter design significantly reduces delay time and enhances noise robustness by quickly pre-charging parasitic capacitance, preventing erroneous switching and ensuring stable operation of high-side semiconductor switches.
Implementation Method 1
The delay between the input and the output signal caused by the level-shifter is due to the charging and the discharging of parasitic capacitors in the input stage
Implementation Method 2
a current source being adapted for injecting a current pulse into the parasitic capacitance depended on variation of the switching signal over time
Implementation Method 3
For edge detection the current source can comprise a current mirror having a first and a second branch, wherein the first branch is electrically connected to the first supply potential via a capacitor and the second branch is connected to the parasitic capacitance
Data Source
AI summary
The invention relates to a level shifter comprising an input stage having a parasitic capacitance and a first input terminal for applying an input signal, a limiter stage having a second input terminal for applying a switching signal, wherein said input stage is coupled between a first supply terminal and said limiter stage, an output stage being coupled between a second supply terminal and said limiter stage and providing an output signal which is a level shifted version of said input signal, and a current source being adapted for injecting a current pulse into said parasitic capacitance dependent on variations of said switching signal over time.