Current-Mirror Level Shifter With Dynamic Cut-Off Control
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Solution Overview
Problem
Conventional level shifters in multi-voltage domain integrated circuits face challenges with high power consumption due to transient short-through current and strong current contention between pull-up and pull-down networks, limiting their operational voltage range and noise tolerance, especially in low power applications like IoT and energy harvesting.
Innovation Solution
A current source based level shifter design that minimizes power consumption by timely turning off strong current paths after signal transitions, using strong pull-up or pull-down devices to drive internal signal nodes and avoid high impedance nodes, thereby achieving low power consumption and wide voltage operation with high noise tolerance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional level shifters are used in multi-voltage domain integrated circuits, then signal level conversion between voltage domains is achieved, but power consumption increases due to transient short-through current and strong current contention between pull-up and pull-down networks
Solution Approach 1:
The level shifter circuit dynamically controls the operation of pull-up and pull-down networks based on the input signal state. The circuit transitions between different operational modes (high impedance state, pull-up active state, pull-down active state) to minimize current contention and transient short-through current, thereby reducing power consumption while maintaining signal integrity and noise tolerance
Solution Approach 2:
The circuit prepares the output node by pre-charging or pre-discharging it before the actual signal transition occurs. This preliminary action reduces the magnitude of transient current spikes during signal level conversion, thereby lowering power consumption while ensuring rapid and reliable signal transitions across voltage domains
2Adaptability or versatility
If conventional level shifters operate in wide voltage range, then adaptability to different voltage domains is improved, but noise tolerance decreases
Solution Approach 1:
The circuit implements different impedance characteristics at different operational phases and for different signal levels. By locally optimizing the impedance properties of pull-up and pull-down networks based on the current operating state, the circuit maintains high noise tolerance across a wide voltage range while adapting to different voltage domain requirements
3Use of energy by moving object
If level shifters are designed for low power consumption, then energy efficiency is improved, but operational frequency range is limited to low frequencies
Solution Approach 1:
The level shifter employs periodic pre-charging and pre-discharging actions that are synchronized with the input signal transitions. This periodic preparation reduces the energy required for each signal transition, enabling low power operation while maintaining sufficient switching speed for frequencies up to a few MHz through efficient use of capacitive charging/discharging cycles
Data Source
AI summary
Embodiments for a level shifter are provided, including: a current mirror comprising a reference current transistor and a mirrored current transistor; a pull-down network comprising a first and a second pull-down transistor, wherein the first and second pull-down transistors are respectively connected in series with the reference and mirrored current transistors; a pull-up transistor connected to an intermediate node located between the mirrored current transistor and the second pull-down transistor; a transition control transistor connected to the gate electrode of the reference current transistor; a cut-off transistor connected between the first pull-down transistor and a common negative power supply voltage; and a first and a second inverter connected to the intermediate node, wherein a control node is located between the first and second inverters, and gate electrodes of the pull-up transistor, the transition control transistor, and the cut-off transistor are connected to the control node.