Level-Shifter Deep Sleep Circuit for Leakage Power Cutoff

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Solution Overview

Problem

Electronic devices face power consumption issues due to leakage currents in inactive circuits, such as low dropout (LDO) regulators, which consume power even when not in use, leading to reduced battery life.

Innovation Solution

A power management system that includes a switch and logic to configure devices in a deep sleep mode by turning off power to circuits with high leakage currents, using a level shifter to control the switch and store status information in registers for efficient reactivation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If circuits such as LDO regulators remain powered on to maintain functionality, then device responsiveness and operational readiness are improved, but power consumption increases due to leakage currents

Engineering Contradiction:
Improvedevice responsivenessVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent segments circuits into two categories: high-leakage circuits (such as LDO regulators) that are completely powered off during deep sleep mode, and low-leakage circuits that remain powered on. This segmentation allows selective power management where only necessary circuits consume power during sleep mode, resolving the contradiction between maintaining device responsiveness and reducing power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary actions by storing status information from high-leakage circuits into registers before entering deep sleep mode. When the device wakes up, this pre-stored information allows for rapid reactivation without needing to maintain continuous power to the circuits, thus improving responsiveness while reducing power consumption during sleep.

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If a switch is opened to turn off power to high leakage circuits, then power consumption is reduced, but device complexity increases due to additional power management components

Engineering Contradiction:
Improvepower consumptionVSAvoidpower management complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The power management logic in the patent is designed to handle multiple functions: it identifies which circuits have high leakage currents, controls the switching of power to these circuits, stores status information in registers, and manages reactivation sequences. This multi-functional design reduces the need for separate dedicated components for each task, thereby reducing overall device complexity while achieving significant power savings.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If all circuits are kept powered on to maintain status information, then reactivation speed is improved, but battery life is reduced due to continuous leakage current

Engineering Contradiction:
Improvereactivation speedVSAvoidbattery life
Core Design Contradiction:
SpeedVSDuration of action of moving object

Solution Approach 1:

The patent applies preliminary action by pre-storing status information from high-leakage circuits into registers before entering deep sleep mode. This allows the circuits to be completely powered off during sleep to extend battery life, while the stored status information enables rapid reactivation without requiring continuous power maintenance, thus resolving the contradiction between reactivation speed and battery life.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a copy of the status information from high-leakage circuits and stores it in registers. This copy allows the original circuits to be powered off completely during deep sleep mode to conserve battery life, while the copied information in registers enables fast reactivation by simply restoring power and reloading the stored status, eliminating the need to maintain continuous power to the original circuits.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS20240427409A1Electrical device with a deep sleep mode implemented with a level shifter
Publication Date: 2024.12.26 QUALCOMM INC
  • US20240427409A1 patent drawing
  • US20240427409A1 patent drawing
  • US20240427409A1 patent drawing

AI summary

Certain aspects of the present disclosure are directed towards an apparatus for power management. The apparatus generally includes a switch and logic configured to: receive an input to configure the apparatus in a deep sleep mode; and open the switch to turn off power from a voltage rail to at least one first circuit having leakage current that is greater than a threshold, wherein at least one second circuit having leakage current less than the threshold is coupled to the voltage rail.