Cross-Coupled Level Shifter for Stable Duty Cycle Across PVT
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Solution Overview
Problem
Existing level shifters in semiconductor circuits suffer from substantial distortion and variation in duty cycle due to PVT (process voltage temperature) variations, often requiring more gates than necessary and using poorly aligned internal reference signals.
Innovation Solution
The implementation of a level shifter with cross-coupled/latch circuitry, symmetric reference nodes, and output circuitry that sets the output signal based on the rising edges of these nodes, reducing distortion and fluctuation by ensuring alignment with the input signal in the time domain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing level shifter circuits are used to convert voltage levels, then voltage level conversion is achieved, but duty cycle distortion and variation occur due to PVT variations
Solution Approach 1:
The patent employs asymmetric transistor sizing in the push-pull output stage, where the first transistor has a different width-to-length ratio than the second transistor. This asymmetry compensates for PVT variations that would otherwise cause duty cycle distortion, allowing the circuit to maintain stable duty cycle performance across process, voltage, and temperature conditions.
Solution Approach 2:
The patent adjusts transistor width-to-length ratios as a key parameter to compensate for PVT variations. By carefully selecting different ratios for transistors in the push-pull stage, the circuit dynamically adapts to process, voltage, and temperature changes, maintaining stable duty cycle without requiring additional calibration circuits.
2Reliability
If more gates are used in existing level shifters to improve duty cycle stability, then duty cycle variation is reduced, but device complexity increases
Solution Approach 1:
The cross-coupled latch circuit serves multiple functions simultaneously: it provides level conversion, edge detection, and duty cycle stabilization. This multi-functionality eliminates the need for separate duty cycle correction circuits, achieving stable duty cycle performance without increasing device complexity.
Solution Approach 2:
The patent combines the level conversion function and duty cycle stabilization function into a single integrated push-pull output stage. By merging these functions rather than implementing them as separate circuits, the design achieves duty cycle stability without adding extra gates or increasing overall circuit complexity.
3Ease of operation
If internal reference signals are used in existing level shifters, then level conversion is achieved, but rising and falling delays become uneven due to poor time domain alignment
Solution Approach 1:
The cross-coupled latch circuit provides feedback mechanisms that ensure symmetric rising and falling delays. The feedback paths through the cross-coupled transistors automatically adjust to maintain equal delay characteristics, compensating for any imbalances that would otherwise occur due to poor time domain alignment of reference signals.
Data Source
AI summary
Disclosed are level shifters and methods of performing level shifting. In one embodiment, a level shifter is disclosed comprising an input, cross-coupled/latch circuitry, a first reference node, a second reference node, and output circuitry coupled between the cross-coupled/latch circuitry and an output, wherein the output circuitry sets the output signal to high based on rising edge of a second reference node and sets the output signal to low based on the rising edge of the first reference node. Further, in some implementations, the first reference node and the second reference node may have signals that are inverse to each other.