Level Shifter Edge Detection for High Slew Rate Immunity

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Solution Overview

Problem

Level shifters often erroneously change state in response to high slew rate signals on the power supply rail, leading to unintended logic state transitions.

Innovation Solution

An edge detector is used to detect high slew rate signals on the power supply rail, initiating a current pulse boost to prevent changes in the logic state of the level shifter's output signals by sinking current from the level shifter when such edges are detected.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the level shifter operates without edge detection protection, then the device complexity is reduced, but the reliability deteriorates due to erroneous state changes from high slew rate signals

Engineering Contradiction:
Improveoutput signal stabilityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The edge detector continuously monitors the power supply rail for high slew rate transitions before they can affect the level shifter output. By detecting these transitions in advance and activating the current pulse boost circuit proactively, the system prevents erroneous state changes before they occur, rather than reacting after the problem manifests

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The edge detector acts as an intermediary component between the power supply rail and the level shifter. It monitors the power supply conditions and controls the current pulse boost circuit to compensate for high slew rate effects, thereby protecting the level shifter from direct exposure to harmful voltage transitions

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a current pulse boost circuit is added to prevent state changes, then the reliability improves, but the device complexity increases

Engineering Contradiction:
Improveimmunity to high slew rate signalsVSAvoidnumber of components
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The edge detector and current pulse boost circuit are integrated into the level shifter architecture as a unified protection mechanism. The edge detector output directly controls the current pulse timing, merging the detection and correction functions into a coordinated system that operates as a single protective unit rather than separate independent circuits

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The level shifter circuit automatically compensates for its own vulnerabilities to high slew rate signals through the integrated edge detector and current pulse boost mechanism. The system monitors its own power supply conditions and self-corrects potential output errors without requiring external intervention or additional complex control circuitry

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents unintended logic state changes in level shifter output signals during high slew rate events, ensuring stable operation even under high-frequency ringing conditions.

Implementation Method 1

a capacitor coupled between the second supply voltage and the second path of the current mirror, wherein a current flowing through the capacitor when a positive going edge on the second supply voltage meets or exceeds the first predetermined slew rate causes the positive edge detector output node to be pulled to a high voltage level

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11671080B1Level shifter with immunity to state changes in response to high slew rate signals
Publication Date: 2023.06.06 ALLEGRO MICROSYSTEMS LLC
  • US11671080B1 patent drawing
  • US11671080B1 patent drawing
  • US11671080B1 patent drawing

AI summary

An integrated circuit (IC) includes a level shifter coupled to receive a first supply voltage and a second supply voltage and configured to generate a first output signal and a second output signal in response to an input command signal and an edge detector configured to detect an edge on the second supply voltage and to sink a current from the level shifter in response to detection of the edge in order to prevent a change in logic state of the first output signal or the second output signal. The edge detector can include a positive edge detector configured to generate a positive edge signal in response to detection of a positive going edge of greater than a first predetermined slew rate and a negative edge detector configured to generate a negative edge signal in response to detection of a negative going edge of greater than a second predetermined slew rate.