Level Shifter Circuit for High-Voltage Fast CMOS Receivers
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Solution Overview
Problem
Modern CMOS technologies face challenges in using fast transistors for receiver circuits due to low dielectric strength, which limits high-speed data transmission over lossy cables, as high input voltages are required but cannot be handled by fast transistors without reducing transmission power or using slow, voltage-resistant transistors that compromise data rate and signal quality.
Innovation Solution
A level converter circuit with resistors and a current setting circuit that adjusts current through these resistors to keep the output voltage within a safe range for fast transistors, using field-effect transistors with gates connected to a voltage divider to control the common-mode level and ensure the transistors operate within a safe range without needing voltage-resistant, slow transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high input voltages are used to enable fast data transmission over lossy cables, then transmission power is increased, but fast transistors cannot handle these voltages due to low dielectric strength
Solution Approach 1:
A level converter circuit is introduced as an intermediary component between the high-voltage transmission line and the fast transistor receiver. This circuit converts the high input voltage to a lower voltage level that the fast transistor can safely process, allowing high transmission power to be used without compromising transistor reliability
Solution Approach 2:
The level converter circuit dynamically changes the voltage parameter from high input voltage to lower output voltage. By controlling the current through resistors connected to the input terminals, the circuit transforms the voltage level to match the transistor's safe operating range while preserving the high-power transmission capability
2Power
If voltage-resistant transistors are used in the input stage to handle high voltages, then transmission power can be maintained, but the switching speed decreases limiting data rate
Solution Approach 1:
The level converter circuit serves as a mediator that allows fast transistors to be used in the input stage by pre-converting the high voltage to a lower level before it reaches the transistor, thus maintaining both high switching speed and appropriate voltage handling
3Power
If voltage-resistant transistors are used for level conversion, then high input voltages can be processed, but gain and bandwidth are reduced due to low switching speed
Solution Approach 1:
The level converter circuit acts as an intermediary that preserves bandwidth by enabling the use of fast transistors. It converts the voltage level before signal processing, allowing high-speed operation to be maintained while still handling high input voltages through the resistor-controlled current mechanism
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the use of fast transistors on the receiver side without sacrificing transmission power, maintaining high data rates and signal quality by ensuring the input transistors operate within a safe range, even without an active supply voltage, thus avoiding bandwidth loss and gain reduction.
Implementation Method 1
the common-mode detector having a voltage divider configured to provide the common-mode level of the output voltage at a midpoint of the voltage divider
Implementation Method 2
the first transistor and the second transistor are field effect transistors, the gates of the field effect transistors being connected to the middle point of the voltage divider
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 2C
AI summary
Embodiments of the present invention provide a level converter circuit with a resistor and a current adjustment circuit. The resistor is connected between an input and an output of the level converter circuit. The current adjustment circuit is configured to influence a current through the resistor such that an output voltage of the level converter circuit does not exceed a maximum allowable value.