Level Shifter Selector for Fast Switching With Low Quiescent Current
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Solution Overview
Problem
Conventional level shifters experience longer propagation delays when transitioning from a high to a low voltage level, requiring increased current sources that result in high quiescent current consumption.
Innovation Solution
A level shifter comprising a pre-level shifter and a selector that automatically selects a fast signal-transmitting path by shifting input digital voltages to first and second digital voltages with sequential level transitions, allowing rapid voltage level shifting without increasing quiescent current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the current of the second current source is increased to rapidly pull the voltage of node a to a high voltage, then the propagation delay is reduced, but the quiescent current increases
Solution Approach 1:
The patent applies dynamics by making the current source adaptive rather than static. The second current source's current value is dynamically adjusted based on the operating state of the level shifter. When rapid voltage transition is needed, the current is increased; when stability is needed, the current is reduced. This resolves the contradiction by allowing the system to have both fast response and low power consumption at different times.
Solution Approach 2:
The patent changes the parameter of the current source (specifically the current value of the second current source) based on operational requirements. By adjusting the current parameter dynamically according to the state of the level shifter, the system can optimize between speed and power consumption, avoiding the need for a constantly high current source that would increase quiescent current.
2Device complexity
If the first PMOSFET, second PMOSFET, third PMOSFET, and fourth PMOSFET are connected to function like a latch, then the circuit structure is simplified, but the voltage transition speed becomes slow
Solution Approach 1:
The patent applies preliminary action by pre-positioning the fourth PMOSFET in a standby state that can rapidly respond when needed. The fourth PMOSFET is connected in parallel with the third PMOSFET but remains inactive during normal operation. When rapid voltage transition is required, the fourth PMOSFET is activated to provide additional driving current, thus maintaining both circuit simplicity and fast response capability.
Data Source
AI summary
A level shifter includes a pre-level shifter and a selector. The selector is coupled to the pre-level shifter. The pre-level shifter shifts an input digital voltage to a first digital voltage and a second digital voltage. The levels of the first digital voltage and the second digital voltage transition sequentially in time when the level of the input digital voltage transitions from one logic to the other. The selector selects and outputs the first digital voltage whose level transitions earlier in time compared to the transition of the level of the second digital voltage.